Analog Integrated Circuit Device Data

Freescale Semiconductor

5

33897/A/B/C/D/T

PIN CONNECTIONS

PIN CONNECTIONS

Figure 4. 33897/A/B/C/D/T Pin Connections

Table 2. Pin Definitions

A functional description of each terminal can be found in the Functional Pin Description section, beginning on page 13.

33897/A/C/T

Terminal

33897B/D

Terminal

Pin Name

Formal Name

Definition

1, 7, 8, 14

8

GND

Ground

Electrical Common Ground and Heat removal. A good thermal path

will also reduce the die temperature.

2

1

TXD

Transmit Data

Data input here will appear on the BUS terminal. A logic [0] will assert

the bus, a logic [1] will make the bus go to the recessive state.

3, 4

2, 3

MODE0,

MODE1

Mode Control

These Pins control Sleep Mode, Transmit Level, and Speed. They

have weak pulldowns.

5

4

RXD

Receive Data

Open drain output of the data on BUS. A recessive bus = a logic [1], a

dominant bus = logic [0]. An external pullup is required.

6, 13

–

NC

No Connect

No internal connection to these Pins. Pin 13 can be connected to GND

to allow the use of the 14-terminal or 8-terminal device. (1)

9

–

CNTL

Control

Provides a battery-level logic signal.

10

5

VBATT

Battery

Power input. An external diode is needed for reverse battery

protection.

11

6

LOAD

Load

The external bus load resistor connects here to prevent bus pullup in

the event of loss of module ground.

12

7

BUS

Bus

This terminal connects to the bus through external components.

Notes

1.

Module boards can be planned for the 14-terminal package and still use the 8-terminal package.

GND

VBATT

CNTL

GND

NC

BUS

LOAD

GND

RXD

NC

GND

TXD

MODE0

MODE1

5

6

7

2

3

4

14

10

9

8

13

12

11

1

33897/A/C/T

2

3

4

8

7

6

5

2

4

3

8

7

5

6

GND

BUS

VBATT

TXD

MODE0

MODE1

RXD

LOAD

33897B/D