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TMS320TCI6487ZUN Datasheet(PDF) 5 Page - Texas Instruments |
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TMS320TCI6487ZUN Datasheet(HTML) 5 Page - Texas Instruments |
5 / 219 page DSP Subsystem2 C64x+Megamodule L1P MemoryController(MemoryProtect/BandwidthMgmt) InstructionFetch EDMA 3.0 A RegisterFile A31- A16 A15- A0 BRegisterFile B31-B16 B15-B0 .L1 .S1 .M1 xx xx .D1 C64x+DSP Core 32KBytes L1P SRAM/Cache Direct-Mapped L2/Cache 0.5-1.5M 32KBytesTotal L1DSRAM/Cache2-Way Set Associative RSA RSA PLL1and PLL1Controller Semaphore RAC (A) Power-DownandDevice ConfigurationLogic L3ROM BootConfiguration DDR2Memory Controller PLL2 SerialRapidIO (2x) TCP2 VCP2 McBSP0 EMAC 10/100/1000 SGMII MDIO Timer[0-5] I2C GPIO16 FSYNC Antenna Interface 32 L1DataMemoryController(MemoryProtect/BandwidthMgmt) DSP Subsystem1 DSP Subsystem0 2 McBSP1 16 .D2 .M2 xx xx .S2 .L2 16-/32-bit InstructionDispatch InstructionDecode ControlRegisters SPLOOP Buffer In-CircuitEmulation TMS320TCI6487 TMS320TCI6488 www.ti.com SPRS358L – APRIL 2007 – REVISED APRIL 2011 1.3 TCI6487/8 Functional Block Diagram Figure 1-2 shows the functional block diagram of the TCI6487/8 device. A. RAC is available only for TCI6488. Figure 1-2. Functional Block Diagram Copyright © 2007–2011, Texas Instruments Incorporated Features 5 Submit Documentation Feedback Product Folder Link(s): TMS320TCI6487 |
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