UCC2919

UCC3919

SLUS374C − JULY 1999 − REVISED NOVEMBER 2005

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APPLICATION INFORMATION

changing with time. The amount of capacitance that can be charged (without causing a fault) when using power

The charge current contribution from the power limiting circuit is defined as:

I

PL ^

V

IN *

V

OUT *

V

PL

R

PL

t0: Normal condition − Output current is nominal, output voltage is at positive rail, VCC.

t1: Fault control reached − Output current rises above the programmed fault value, CT begins to charge with 35 µA + IPL.

t2: Maximum current reached − Output current reaches the programmed maximum level and becomes a constant current with value IMAX.

t3: Fault occurs − CT has charged to 1.5 V, fault output goes low, the FET turns off allowing no output current to flow, VOUT discharges to GND.

t4: Retry − CT has discharged to 0.5 V, but fault current is still exceeded, CT begins charging again, FET is on, VOUT increases.

t3 to t5: Illustrates < 3% duty cycle depending upon RPL selected.

t6 = t4

t7: Fault released, normal condition − return to normal operation of the circuit breaker

UDG−97073

Figure 3.

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