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PE94302 Datasheet(PDF) 2 Page - Peregrine Semiconductor

Part # PE94302
Description  RF Digital Step Attenuator For Rad-Hard Space Applications
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Manufacturer  PSEMI [Peregrine Semiconductor]
Direct Link  http://www.psemi.com
Logo PSEMI - Peregrine Semiconductor

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Product Specification
PE94302
Page 2 of 6
©2005-2008 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0186-04
│ UltraCMOS™ RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rate specified.
Exposed Solder Pad Connection
The exposed solder pad on the bottom of the package
must be grounded for proper device operation.
Table 4. Operating Ranges
Figure 3. Pin Configuration (Top View)
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Power supply voltage
-0.3
4.0
V
VI
Voltage on any DC input
-0.3
VDD+
0.3
V
TST
Storage temperature range
-65
150
°C
P
IN
Input power (50
Ω)
24
dBm
VESD
ESD voltage (Human Body
Model)
500
V
Vss
Negative Power supply
voltage (-VDD)
-4.0
0.3
V
Parameter
Min
Typ
Max
Units
VDD Power Supply Voltage
2.7
3.0
3.3
V
IDD Power Supply Current
250
µA
Digital Input High
0.7xVDD
V
Digital Input Low
0.3xVDD
V
Digital Input Leakage
1
µA
TOP Operating temperature
range
-40
85
°C
Vss Power Supply Voltage
-3.3
-3.0
-2.7
V
Iss Power Supply Current
-500
µA
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Switching Frequency
The PE94302 has a maximum 25 kHz switching rate.
Pin No.
Pin Name
1
C16
2
GND
3
RF1
4
GND
5
Data
6
GND
7
CLK
8
LE
9
VDD
10
GND
11
RS1
12
GND
13
RS2
14
VSS
15
Reset
16
GND
17
P/S
18
GND
19
RF2
20
GND
21
C8
22
C4
23
C2
24
GND
25
GND
26
GND
27
C1
28
C0.5
Paddle
GND
Description
Attenuation control bit, 16dB
Ground connection
RF port (Note 1).
Ground connection
Serial interface data input
Ground connection
Serial interface clock input.
Latch Enable input (Note 2).
Power supply pin.
Ground connection
Redundant Signal (note 3)
Ground connection
Redundant Signal (Note 3)
Negative supply voltage (Note 4)
Reset (Note 5)
Ground connection
Parallel/Serial mode select.
Ground connection
RF port (Note 1).
Ground connection
Attenuation control bit, 8 dB.
Attenuation control bit, 4 dB.
Attenuation control bit, 2 dB.
Ground connection
Ground connection
Ground connection
Attenuation control bit, 1 dB.
Attenuation control bit, 0.5 dB.
Ground connection
PE94302
5
3
17
19
1
2
4
18
6
7
20
21
16
15
C16
GND
RF1
GND
GND
GND
GND
GND
Data
CLK
Reset
P/S
RF2
C8
Note 1: Both RF ports must be held at 0 VDC or DC blocked with an
external series capacitor.
2: Latch Enable (LE) has an internal 100 k
Ωresistor to V
DD.
3: Must be tied to Vdd or GND under normal operation.
4: Must be tied to external supply with VSS = -VDD
5: Must be tied to GND under normal operation
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted to
the limits in the Operating Ranges table. Operation
between operating range maximum and absolute
maximum for extended periods may reduce reliability.


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