UJA1163 datasheet(10/28 Pages) NXP

Part #	UJA1163

Description	Mini high-speed CAN system basis chip with Standby mode

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Manufacturer	NXP [NXP Semiconductors]

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UJA1163

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Product data sheet

Rev. 1 — 1 October 2013

10 of 28

NXP Semiconductors

UJA1163

Mini high-speed CAN system basis chip with Standby mode

It will be switched on again on entering CAN Offline mode when VBAT rises above the

undervoltage release threshold and the SBC is no longer in Off/Overtemp mode.

6.5.2 CAN standard wake-up

The UJA1163 monitors the bus for a wake-up pattern when the CAN transceiver is in

Offline mode.

A filter at the receiver input prevents unwanted wake-up events occurring due to

automotive transients or EMI. A dominant-recessive-dominant wake-up pattern must be

transmitted on the CAN bus within the wake-up timeout time (tto(wake)) to pass the wake-up

filter and trigger a wake-up event (see Figure 5; note that additional pulses may occur

between the recessive/dominant phases). The recessive and dominant phases must last

at least twake(busrec) and twake(busdom), respectively.

Pin RXD is driven LOW when a valid CAN wake-up pattern is detected on the bus.

Fig 5.

CAN wake-up timing

tdom ≥ twake(busdom)

recessive

trec ≥ twake(busrec)

tdom ≥ twake(busdom)

dominant

015aaa267

twake < tto(wake)

CAN wake-up

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