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BLF188XR Datasheet(PDF) 2 Page - NXP Semiconductors |
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BLF188XR Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 15 page BLF188XR_BLF188XRS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 5 — 12 November 2013 2 of 15 NXP Semiconductors BLF188XR; BLF188XRS Power LDMOS transistor 2. Pinning information [1] Connected to flange. 3. Ordering information 4. Limiting values [1] Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF calculator Table 2. Pinning Pin Description Simplified outline Graphic symbol BLF188XR (SOT539A) 1drain1 2drain2 3gate1 4gate2 5source [1] BLF188XRS (SOT539B) 1drain1 2drain2 3gate1 4gate2 5source [1] Table 3. Ordering information Type number Package Name Description Version BLF188XR - flanged balanced ceramic package; 2 mounting holes; 4 leads SOT539A BLF188XRS - earless flanged balanced ceramic package; 4 leads SOT539B Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage - 135 V VGS gate-source voltage 6+11 V Tstg storage temperature 65 +150 C Tj junction temperature [1] - 225 C |
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