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LM95071CIMFX Datasheet(PDF) 4 Page - Texas Instruments |
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LM95071CIMFX Datasheet(HTML) 4 Page - Texas Instruments |
4 / 20 page CS SC SO CS SC SO t5 t5 CS SC SO t3 t2 t4 t1 t4 tr tf LM95071, LM95071-Q1 SNIS137D – AUGUST 2004 – REVISED SEPTEMBER 2013 www.ti.com SERIAL BUS DIGITAL SWITCHING CHARACTERISTICS Unless otherwise noted, these specifications apply for VDD = 2.4V to 5.5V (1); C L (load capacitance) on output lines = 100 pF unless otherwise specified. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25°C, unless otherwise noted. Test Unit Symbol Parameter Typical(2) Limits(3) Conditions (Limit) t1 SC (Clock) Period 0.16 µs (min) DC (max) t2 CS Low to SC (Clock) High Set-Up Time 100 ns (min) t3 CS Low to Data Out (SO) Delay 70 ns (max) t4 SC (Clock) Low to Data Out (SO) Delay 70 ns (max) t5 CS High to Data Out (SO) TRI-STATE 200 ns (max) t6 SC (Clock) High to Data In (SI) Hold Time 50 ns (min) t7 Data In (SI) Set-Up Time to SC (Clock) High 30 ns (min) t8 SC (Clock) High to CS High Hold Time 50 ns (min) (1) The LM95071/LM95071-Q1 will operate properly over the VDD supply voltage range of 2.4V to 5.5V. (2) Typicals are at TA = 25°C and represent most likely parametric norm. (3) Limits are guaranteed to TI's AOQL (Average Outgoing Quality Level). Figure 2. Data Output Timing Diagram Figure 3. TRI-STATE Data Output Timing Diagram 4 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM95071 LM95071-Q1 |
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