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SN65LVDS822RGZR Datasheet(PDF) 5 Page - Texas Instruments |
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SN65LVDS822RGZR Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 27 page  SN65LVDS822 www.ti.com SLLSEE8A – SEPTEMBER 2013 – REVISED OCTOBER 2013 TERMINAL FUNCTIONS NAME NO. I/O DESCRIPTION A0P, A0N 26, 25 LVDS Data Lane 0 A1P, A1N 28, 27 LVDS Data Lane 1 A2P, A2N 30, 29 LVDS Input LVDS Data Lane 2 A3P, A3N 34, 33 LVDS Data Lane 3 CLKP, CLKN 32, 31 LVDS Clock (SWAP = L / H) D0 22 / 38 D1 21 / 39 D2 20 / 40 D3 19 / 42 D4 18 / 46 D5 16 / 47 D6 13 / 2 D7 12 / 3 D8 11 / 4 D9 10 / 5 D10 9 / 7 D11 8 / 8 D12 4 / 11 CMOS Output Data bus output D13 3 / 12 D14 2 / 13 D15 1 / 14 D16 48 / 15 D17 47 / 16 D18 40 / 20 D19 39 / 21 D20 38 / 22 D21 15 / 48 D22 14 / 1 D23 7 / 9 D24 5 / 10 D25 46 / 18 D26 42 / 19 CLKOUT 41 Clock output for the data bus Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links :SN65LVDS822 |
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