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TLK106L Datasheet(PDF) 4 Page - Texas Instruments |
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TLK106L Datasheet(HTML) 4 Page - Texas Instruments |
4 / 105 page 32 9 31 10 30 11 29 12 28 13 27 14 26 15 25 16 24 1 23 2 22 3 21 4 20 5 19 6 18 7 17 8 GND PFBIN2 RXD_3 / PHYAD4 XI XO VDD_IO MDC MDIO RESET LED_LINK (MLED*) / AN_0 TX_CLK TX_EN TXD_0 TXD_1 TXD_2 TXD_3 INT / PWDN TLK105L TLK106L SLLSEE3A – AUGUST 2013 – REVISED NOVEMBER 2013 www.ti.com 2 Pin Descriptions The TLK10xL pins fall into the following interface categories (subsequent sections describe each interface): • Serial Management Interface • Reset and Power Down • MAC Data Interface • Bootstrap Configuration Inputs • Clock Interface • 10/100Mbs PMD Interface • LED Interface • Special Connect Pins • Power and Ground pins Note: Configuration pin option. See Section 3.1 for Jumper Definitions. The definitions below define the functionality of each pin. Type: I Input Type: OD Open Drain Type: O Output Type: PD, PU Internal Pulldown/Pullup Type: I/O Input/Output Type: S Configuration Pin (All configuration pins have weak internal pullups or pulldowns. Use an external 2.2k Ω resistor if you need a different default value. See Section 3.1 for details.) 2.1 Pin Layout * MLED can be routed via REG 0x0025 (MLEDCR Register), for further details see Section 3.8. Figure 2-1. TLK10xL PIN DIAGRAM, TOP VIEW This document describes signals that take on different names depending on configuration. In such cases, the different names are placed together and separated by slash (/) characters. For example, "RXD_3 / PHYAD4". Active low signals are represented by overbars. . . . 4 Pin Descriptions Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TLK105L TLK106L |
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