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TLK10081CTR Datasheet(PDF) 1 Page - Texas Instruments |
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TLK10081CTR Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 62 page  10GBPS 10GBPS TLK10081 TLK10081 10GBPS 10GBPS ASP 1 ASP 2 ASP 3 ASP 4 ASP 5 ASP 6 ASP 7 ASP 8 ASP 9 ASP 10 ASP 11 ASP 12 ASP 13 ASP 14 ASP 15 ASP 16 TLK10081 10GBPS 10GBPS Optional FANOUT or REDUNDANT BACKPLANE OPTICAL 1.25GBPS EQ Buffer X PT 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS ASP 1 1.25GBPS 1.25GBPS ASP 2 1.25GBPS 1.25GBPS ASP 3 1.25GBPS 1.25GBPS ASP 4 1.25GBPS 1.25GBPS ASP 5 1.25GBPS 1.25GBPS ASP 6 1.25GBPS 1.25GBPS ASP 7 1.25GBPS 1.25GBPS ASP 8 1.25GBPS 1.25GBPS ASP 9 ASP 10 ASP 11 ASP 12 ASP 13 ASP 14 ASP 15 ASP 16 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS 1.25GBPS Backplane Optical TLK10081 www.ti.com SLLSEE9 – NOVEMBER 2013 10Gbps 1-8 CHANNEL MULTI-RATE SERIAL LINK AGGREGATOR Check for Samples: TLK10081 1 INTRODUCTION 1.1 Features 1 • Automatic Digital Multiplexing/De-Multiplexing • Raw (Unencoded) Data Support of 1 to 8 Independent Lower Speed Gigabit • Core Supply 1V; I/O: 1.5V/1.8V Serial Lines into a Single Higher Speed Gigabit • Superior Signal Integrity Performance Serial Line with Extensive Media Transmission • Low Power Operation: < 800 mW per channel Capabilities. (typ) • 1~8 x (0.25 to 1.25 Gbps) to 1 x (2 to 10 Gbps) • Rate Matching Support (For compatible data Multiplexing protocols like GE PCS) • 1 x (0.5 to 2.5 Gbps) to 1 x (0.5 to 2.5 Gbps) • Full Non-Blocking Receiver Crosspoint • Dynamic Port Aggregation Supported Mapping Capability • Programmable High Speed Redundant • Flexible Clocking Switching • Multi Drive Capability (SFP+, backplane, cable) • Wide Data Rate Range for Multiple Application • Support for Programmable High Speed Lane Support Alignment Characters • Transmit De-Emphasis and Adaptive Receiver • Support for Programmable HS/LS 10-Bit Equalization on Both Low Speed and High Alignment Characters Speed Sides • Wide Range of Built-in Test Patterns • MDIO Clause 22 control interface • 144-pin, 13mmx13mm FCBGA Package • 8B/10B ENDEC Coding Support 1.2 Applications • Gigabit Serial Link Aggregation • Machine Vision • Communications System Backplanes • Video/Image Data Processing spacing 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to Copyright © 2013, Texas Instruments Incorporated specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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