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TMX320F28377DPTPS Datasheet(PDF) 1 Page - Texas Instruments |
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TMX320F28377DPTPS Datasheet(HTML) 1 Page - Texas Instruments |
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1 / 110 page  TMS320F28377D, TMS320F28376D www.ti.com SPRS880 – DECEMBER 2013 TMS320F2837xD Dual-Core Delfino™ Microcontrollers Check for Samples: TMS320F28377D, TMS320F28376D 1 TMS320F2837xD Dual-Core Delfino MCUs 1.1 Features 123 • Dual-Core Architecture • Analog Subsystem – Two TMS320C28x™ 32-Bit CPUs – Four Dual-Mode Analog-to-Digital Converters – 200 MHz (5-ns Cycle Time) – 16-Bit Mode – IEEE 754 Single-Precision Floating-Point • 1.1 MSPS Each (Up to 4.4-MSPS System) Unit (FPU) • Differential – Trigonometric Math Unit (TMU) • External Reference – Viterbi/Complex Math Unit (VCU-II) • Up to 12 External Channels – 16 x 16 and 32 x 32 MAC Operations – 12-Bit Mode – 16 x 16 Dual MAC • 3.5 MSPS Each (Up to 14-MSPS System) – Three 32-Bit CPU Timers per Core • Single-Ended or Differential – Harvard Bus Architecture • External Reference – Fast Interrupt Response and Processing • Up to 24 External Channels – Unified Memory Programming Model – Single Sample-and-Hold (S/H) • Two Programmable Control Law Accelerators (Four-Simultaneous-S/H System) – 200 MHz (5-ns Cycle Time) – Integrated Post-Processing of ADC Conversions – 32-Bit Floating-Point Math Accelerator (IEEE 754 Single Precision) • Saturating Offset Calibration – Executes Code Independently of Main CPU • Error From Setpoint Calculation • On-Chip Memory • High, Low, and Zero-Crossing Compare, With Interrupt Capability – Up to 1MB Flash, Up to 204KB RAM • Trigger-to-Sample Delay Capture – Boot ROM (64KB) – Analog Comparator/Digital-to-Analog • SPI, I2C, CAN, and Parallel I/O Software Converter (DAC) Subsystem With Glitch Boot Modes Filter, for Windowed Trip Monitor and PCMC • Standard Math Tables Interfaces • System Peripherals • Eight Windowed Comparators With 12-Bit – Dual 32- and 16-Bit EMIF With ASRAM and DAC References SDRAM Support – Three 12-Bit Buffered DAC Outputs – Dual 6-Channel DMA Controller • Enhanced Control Peripherals – Up to 169 Individually Programmable, – 24 PWM Channels With Enhanced Features Multiplexed GPIO Pins With Input Filtering – 16 High-Resolution PWM Channels • Communications Peripherals • High-Resolution on Both A and B – USB 2.0 + PHY Port Channels of 8 PWM Modules – Support for 12-Pin 3.3 V-Compatible • Dead-Band Support (on Both Standard Universal Parallel Port (uPP) Interface and High-Resolution) – Two CAN-Bus Ports (32 Mailboxes Each) – Six Capture Modules – Three High-Speed (40-MHz) SPI Ports With – Three Quadrature Encoder Pulse 16-Level FIFO, DMA Support, and (QEP) Modules CLA-Accessible – Two Sigma-Delta Filter Modules (SDFMs) – Two Multichannel Buffered Serial Ports With up to 8 Input Channels, Plus PWM – Four Serial Communications Interfaces Synchronization – Two Inter-Integrated Circuit (I2C) Interfaces 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 Delfino, TMS320C28x, Code Composer Studio, DSP/BIOS, SYS/BIOS, PowerPAD, C2000, TMS320C54x, TMS320C55x, XDS510, XDS560, C28x are trademarks of Texas Instruments. 3 All other trademarks are the property of their respective owners. ADVANCE INFORMATION concerns new products in the sampling or preproduction Copyright © 2013, Texas Instruments Incorporated phase of development. Characteristic data and other specifications are subject to change without notice. |
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