SMV512K32HFGMPR datasheet(10/25 Pages) TI

Part #	SMV512K32HFGMPR

Description	16-Mb RADIATION-HARDENED SRAM

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Manufacturer	TI [Texas Instruments]

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SMV512K32-SP

SLVSA21H – JUNE 2011 – REVISED JULY 2013

www.ti.com

Table 5. AC Characteristics Write Cycle (1)

SYMBOL

PARAMETER

MIN

MAX

UNIT

FIGURE

Figure 7

Figure 9

tAVAV

Write-through cycle time

20

ns

Figure 10

Figure 12

Figure 8

tAVAV2

(2)

Write cycle time with GZ always high

13.8

ns

Figure 11

Figure 7

tETWH

Device enable to end of write (WZ-controlled)

12

ns

Figure 8

Figure 9

Figure 10

tETWH2

(3)

Device enable to end of write (E-controlled)

11

ns

Figure 12

Figure 10

tAVET

Address setup time for write (E-controlled)

1.4

ns

Figure 11

Figure 12

Figure 7

Figure 9

tEFQZ

E-controlled tri-state time

3.5

5

ns

Figure 10

Figure 12

Figure 7

tAVWL

Address setup time for write (WZ-controlled)

3.6

ns

Figure 8

Figure 9

Figure 7

tWLWH

Write pulse width

7.9

ns

Figure 8

Figure 9

Figure 7

tWHAX

(3)

Address hold time for write-through (WZ-controlled)

8.5

ns

Figure 9

tWHAX1

(2)

Address hold time for write (WZ-controlled) with GZ always high

2.3

ns

Figure 8

Figure 10

tEFAX

Address hold time for device enable (E-controlled)

0.1

ns

Figure 11

Figure 12

Figure 10

tETEF

(3)

Device enable pulse width (E-controlled)

19.5

ns

Figure 12

tETEF1

(2)

Device enable pulse width (E-controlled) with GZ always high

12.3

ns

Figure 11

Figure 7

Figure 8

tDVWH

Data setup time

8.2

ns

Figure 9

Figure 10

Figure 12

Figure 7

Figure 8

tWHDX

Data hold time

0.2

ns

Figure 9

Figure 10

Figure 12

Figure 7

Figure 9

tWHEF

Write disable time to device disable for write-through

8.5

ns

Figure 10

Figure 12

tWHEF1

(2)

Write disable time to device disable with GZ always high

2.3

ns

Figure 8

Figure 7

tWHWL

Write disable time. Write pulse width high for write-through.

12.1

ns

Figure 9

tWHWL1

(2)

Write disable time. Write pulse width high with GZ always high.

2.6

ns

Figure 8

Figure 7

tWHQX

WZ-controlled tri-state end time

3

ns

Figure 10

Figure 7

tWHQV

WZ-controlled output data valid

10

ns

Figure 10

tWLQZ

WZ-controlled tri-state time

2

3.3

ns

Figure 7

(1)

TC = -55°C to 125°C, VDD1 = 1.7 V to 1.9 V, VDD2 = 3 V to 3.6 V (unless otherwise noted).

(2)

Write-only operations with GZ fixed high (no write-through).

(3)

Parameters ensured by design and/or characterization if not production tested.

10

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