AD9629

Rev. 0 | Page 4 of 32

SPECIFICATIONS

DC SPECIFICATIONS

AVDD = 1.8 V; DRVDD = 1.8 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference; AIN = −1.0 dBFS, 50% duty

cycle clock, unless otherwise noted.

Table 1.

Parameter

Temp

AD9629-20/AD9629-40

AD9629-65

AD9629-80

Unit

Min

Typ

Max

Min

Typ

Max

Min

Typ

Max

RESOLUTION

Full

12

12

12

Bits

ACCURACY

No Missing Codes

Full

Guaranteed

Guaranteed

Guaranteed

Offset Error

Full

−0.40

+0.05

+0.50

−0.40

+0.05

+0.50

−0.40

+0.05

+0.50

% FSR

Gain Error1

Full

−1.5

−1.5

−1.5

% FSR

Differential Nonlinearity (DNL)2

Full

±0.25

±0.25

±0.30

LSB

25°C

±0.11

±0.11

±0.16

LSB

Integral Nonlinearity (INL)2

Full

±0.40

±0.30

±0.35

LSB

25°C

±0.11

±0.13

±0.16

LSB

TEMPERATURE DRIFT

Offset Error

Full

±2

±2

±2

ppm/°C

INTERNAL VOLTAGE REFERENCE

Output Voltage (1 V Mode)

Full

0.984

0.996

1.008

0.984

0.996

1.008

0.984

0.996

1.008

V

Load Regulation Error at 1.0 mA

Full

2

2

2

mV

INPUT-REFERRED NOISE

VREF = 1.0 V

25°C

0.25

0.25

0.25

LSB rms

ANALOG INPUT

Input Span, VREF = 1.0 V

Full

2

2

2

V p-p

Input Capacitance3

Full

6

6

6

pF

Input Common-Mode Voltage

Full

0.9

0.9

0.9

V

Input Common-Mode Range

Full

0.5

1.3

0.5

1.3

0.5

1.3

V

REFERENCE INPUT RESISTANCE

Full

7.5

7.5

7.5

kΩ

POWER SUPPLIES

Supply Voltage

AVDD

Full

1.7

1.8

1.9

1.7

1.8

1.9

1.7

1.8

1.9

V

DRVDD

Full

1.7

3.6

1.7

3.6

1.7

3.6

V

Supply Current

IAVDD2

Full

24.9/31.1

26.7/33.2

41.2

46.0

46.8

50.0

mA

IDRVDD2 (1.8 V)

Full

1.5/2.5

4.2

5.0

mA

IDRVDD2 (3.3 V)

Full

2.7/4.7

7.5

9.0

mA

POWER CONSUMPTION

DC Input

Full

45.0/56.7

75

85.2

mW

Sine Wave Input2 (DRVDD = 1.8 V)

Full

47.5/60.5

50.7/65.0

81.7

86.0

93

100

mW

Sine Wave Input2 (DRVDD = 3.3 V)

Full

53.7/71.7

98.9

114

mW

Standby Power4

Full

34

34

34

mW

Power-Down Power

Full

0.5

0.5

0.5

mW