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MP2362DF Datasheet(PDF) 4 Page - Monolithic Power Systems |
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MP2362DF Datasheet(HTML) 4 Page - Monolithic Power Systems |
4 / 11 page MP2362 — DUAL 2A, 23V, 380KHZ STEP-DOWN CONVERTER MP2362 Rev. 0.93 www.MonolithicPower.com 4 1/25/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. PIN FUNCTIONS Pin # Name Description 1 SYNCA Synchronization Input for Channel A. It is internally pulled down to ground with a 11kΩ resistor. Leave it open if unused. 2 NC No Connect 3 BSA High-Side Driver Boost Pin. Connect a 10nF capacitor from this pin to SWA. 4 INA Supply Voltage Channel A. The MP2362 operates from a +4.75V to +23V unregulated input. Input Ceramic Capacitors should be close to this pin. 5 SWA Switch Channel A. This connects the inductor to either INA through M1A or to PGA through M2A. 6 PGA Power Ground Channel A. This is the Power Ground Connection to the input capacitor ground. 7 SGA Signal Ground Channel A. This pin is the signal ground reference for the regulated output voltage. For this reason care must be taken in its layout. This node should be placed outside of the D1 to C1 ground path to prevent switching current spikes from inducing voltage noise into the part. 8 FBB Feedback Voltage for Channel B. This pin is the feedback voltage. The output voltage is ratio scaled through a voltage divider, and the center point of the divider is connected to this pin. The voltage is compared to the on board 1.22V reference. 9 COMPB Compensation Channel B. This is the output of the transconductance error amplifier. A series RC is placed on this pin for proper control loop compensation. Please refer to more in the datasheet. 10 ENB Enable/UVLO Channel B. A voltage greater than 2.62V enables operation. Leave ENB unconnected for automatic startup. An Under Voltage Lockout (UVLO) function can be implemented by the addition of a resistor divider from VIN to GND. For complete low current shutdown the ENB pin voltage needs to be less than 700mV. 11 SYNCB Synchronization Input for Channel B. It is internally pulled down to ground with a 11kΩ resistor. Leave it open if unused. 12 BSB High-Side Driver Boost Pin. Connect a 10nF capacitor from this pin to SWB. 13 NC No Connect. 14 INB Supply Voltage Channel B. The MP2362 operates from a +4.75V to +23V unregulated input. Input Ceramic Capacitors should be close to this pin. 15 SWB Switch Channel B. This connects the inductor to either INB through M1B or to PGB through M2B. 16 PGB Power Ground Channel B. This is the Power Ground Connection to the input capacitor ground. 17 SGB Signal Ground Channel B. This pin is the signal ground reference for the regulated output voltage. For this reason care must be taken in its layout. This node should be placed outside of the D1 to C1 ground path to prevent switching current spikes from inducing voltage noise into the part. 18 FBA Feedback Voltage for Channel A. This pin is the feedback voltage. The output voltage is ratio scaled through a voltage divider, and the center point of the divider is connected to this pin. The voltage is compared to the on board 1.22V reference. 19 COMPA Compensation Channel A. This is the output of the transconductance error amplifier. A series RC is placed on this pin for proper control loop compensation. Please refer to more in the datasheet. 20 ENA Enable/UVLO Channel A. A voltage greater than 2.62V enables operation. Leave ENA unconnected for automatic startup. An Under Voltage Lockout (UVLO) function can be implemented by the addition of a resistor divider from VIN to GND. For complete low current shutdown the ENA pin voltage needs to be less than 700mV. |
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