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STRG6652 Datasheet(PDF) 1 Page - Allegro MicroSystems |
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STRG6652 Datasheet(HTML) 1 Page - Allegro MicroSystems |
1 / 8 page The STR-G6651 is specifically designed to satisfy the requirements for increased integration and reliability in off-line quasi-resonant flyback converters. This device incorporates the primary control and drive circuit with a discrete avalanche-rated power MOSFET. Cycle-by-cycle current limiting, under-voltage lockout with hyster- esis, over-voltage protection, and thermal shutdown protects the power supply during the normal overload and fault conditions. Over-voltage protection and thermal shutdown are latched after a short delay. The latch may be reset by cycling the input supply. Low-current startup and a low-power standby mode selected from the secondary circuit completes a comprehensive suite of features. The device is provided in a five-pin over-molded TO-220 style package, affording dielectric isolation without compromising thermal characteristics. Two lead forms are available (with and without the suffix ‘-LF’) to accommodate printed wiring board layout or mechanical constraints. Proven in substantial volumes, the STR-G6651 is a robust low-risk solution for off-line power supplies particularly where management of EMI at the source is a significant element of the system design. FEATURES I Quasi-Resonant Operation I Output Power to 66 W I Low-Loss, Pulse-Ratio-Control Standby Mode I Temperature-Compensated Pulse-by-Pulse Over-Current Protection I Latched Over-Voltage and Thermal Protection I Under-Voltage Lockout with Hysteresis I Active Low-Pass Filter for Enhanced Light-Load Stability I Switched Attenuation of Leading-Edge Current-Sensing Signal I Regulated Soft Gate Drive I Adjustable Switching Speed for EMI Control I Overmolded Five-Pin Package OFF-LINE QUASI-RESONANT FLYBACK SWITCHING REGULATOR Always order by complete part number: STR-G6651 . ™ STR-G6651 ABSOLUTE MAXIMUM RATINGS at T A = +25°C Control Supply Voltage, V IN . . . . . . . 35 V Drain-Source Voltage, V DS . . . . . . . . 650 V Drain Current, I D continuous . . . . . . . . . . . . . . . . . . 2.7 A single-pulse, t w ≤ 1 ms . . . . . . . . 7.2 A Avalanche Energy, E AS single-pulse . . . . . . . . . . . . . . . 158 mJ Over-Current Protection Voltage Range, V OCP . . . . . . . . . . . . . . . -0.3 V to +6 V Insulation RMS Voltage, V WM(RMS) . . . . . . . . . . . . . . . . . . 2000 V Package Power Dissipation, P D control (V IN x IIN(ON)) . . . . . . . . . 0.8 W total . . . . . . . . . . . . . . . . . . . See Graph FET Channel Temperature, T J . . . +150 °C Internal Frame Temperature, T F . . +125 °C Operating Temperature Range, T A . . . . . . . . . . . . . . . -20 °C to +125°C Storage Temperature Range, T S . . . . . . . . . . . . . . . -40 °C to +125°C Dwg. PK-011 UVLO OVP TSD LATCH OSC. FDBK |
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