LY62L51216

Rev. 1.6

512K X 16 BIT LOW POWER CMOS SRAM

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

1

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FEATURES

 Fast access time : 55/70ns

 Low power consumption:

Operating current : 30/20mA (TYP.)

Standby current : 5

A (TYP.) LL-version

1.5

A (TYP.) SL-version

 Single 2.7V ~ 3.6V power supply

 All inputs and outputs TTL compatible

 Fully static operation

 Tri-state output

 Data byte control : LB# (DQ0 ~ DQ7)

UB# (DQ8 ~ DQ15)

 Data retention voltage : 1.2V (MIN.)

 Green package available

 Package : 44-pin 400mil TSOP-II

48-ball 6mm x 8mm TFBGA

GENERAL DESCRIPTION

The LY62L51216 is a 8,388,608-bit low power

CMOS static random access memory organized as

524,288 words by 16 bits. It is fabricated using very

high performance, high reliability CMOS technology.

Its standby current is stable within the range of

operating temperature.

The LY62L51216 is well designed for low power

application, and particularly well suited for battery

back-up nonvolatile memory application.

The LY62L51216 operates from a single power

supply of 2.7V ~ 3.6V and all inputs and outputs are

fully TTL compatible

PRODUCT FAMILY

Product

Family

Operating

Temperature

Vcc Range

Speed

Power Dissipation

Operating(Icc,TYP.)

LY62L51216

0 ~ 70℃

2.7 ~ 3.6V

55/70ns

5µA(LL)/1.5µA(SL)

30/20mA

LY62L51216(I)

-40 ~ 85℃

2.7 ~ 3.6V

55/70ns

5µA(LL)/1.5µA(SL)

30/20mA

FUNCTIONAL BLOCK DIAGRAM

CONTROL

CIRCUIT

CE#

WE#

OE#

DECODER

512Kx16

MEMORY ARRAY

COLUMN I/O

A0-A18

Vcc

Vss

DQ8-DQ15

Upper Byte

DQ0-DQ7

Lower Byte

I/O DATA

CIRCUIT

LB#

UB#

PIN DESCRIPTION

SYMBOL

DESCRIPTION

A0 - A18

Address Inputs

DQ0

– DQ15 Data Inputs/Outputs

CE#

Chip Enable Input

WE#

Write Enable Input

OE#

Output Enable Input

LB#

Lower Byte Control

UB#

Upper Byte Control

Power Supply

Ground