LY61L6416GL-10LLET datasheet(6/14 Pages) LYONTEK

Part #	LY61L6416GL-10LLET

Description	64K X 16 BIT HIGH SPEED CMOS SRAM

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Manufacturer	LYONTEK [Lyontek Inc.]

Direct Link	http://www.lyontek.com.tw

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6 / 14 page

LY61L6416

Rev. 2.0

64K X 16 BIT HIGH SPEED CMOS SRAM

Lyontek Inc. reserves the rights to change the specifications and products without notice.

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

5

®

AC TEST CONDITIONS

Input Pulse Levels

0.2V to VCC -0.2V

Input Rise and Fall Times

3ns

Input and Output Timing Reference Levels

1.5V

Output Load

CL = 30pF + 1TTL, IOH/IOL = -4mA/8mA

AC ELECTRICAL CHARACTERISTICS

(1) READ CYCLE

PARAMETER

SYM. LY61L6416

-8

LY61L6416

-10

LY61L6416

-12

LY61L6416

-15

LY61L6416

-20

UNIT

MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.

Read Cycle Time

tRC

8

-

10

-

12

-

15

-

20

-

ns

Address Access Time

tAA

-

8

-

10

-

12

-

15

-

20

ns

Chip Enable Access Time

tACE

-

8

-

10

-

12

-

15

-

20

ns

Output Enable Access Time

tOE

-

4-

5-

6-

7

-

8

ns

Chip Enable to Output in Low-Z

tCLZ*

2

-2-3-4

-

4

-

ns

Output Enable to Output in Low-Z

tOLZ*

0

-0-0-0

-

0

-

ns

Chip Disable to Output in High-Z

tCHZ*

-

4-

5-

6-

7

-

8

ns

Output Disable to Output in High-Z

tOHZ*

-

4-

5-

6-

7

-

8

ns

Output Hold from Address Change

tOH

3

-3-3-3

-

3

-

ns

LB#, UB# Access Time

tBA

-

4-

5-

6-

7

-

8

ns

LB#, UB# to High-Z Output

tBHZ*

-

4-

5-

6-

7

-

8

ns

LB#, UB# to Low-Z Output

tBLZ*

0

-0-0-0

-

0

-

ns

(2) WRITE CYCLE

PARAMETER

SYM. LY61L6416

-8

LY61L6416

-10

LY61L6416

-12

LY61L6416

-15

LY61L6416

-20

UNIT

MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.

Write Cycle Time

tWC

8

-

10

-

12

-

15

-

20

-

ns

Address Valid to End of Write

tAW

6.5

-

8

-

10

-

12

-

15

-

ns

Chip Enable to End of Write

tCW

6.5

-

8

-

10

-

12

-

15

-

ns

Address Set-up Time

tAS

0

-0-

0

-0

-

0

-

ns

Write Pulse Width

tWP

6.5

-

8

-

9

-

10

-

12

-

ns

Write Recovery Time

tWR

0

-0-

0

-0

-

0

-

ns

Data to Write Time Overlap

tDW

5

-6-

7

-8

-

9

-

ns

Data Hold from End of Write Time

tDH

0

-0-

0

-0

-

0

-

ns

Output Active from End of Write

tOW*

1.5

-2-

3

-4

-

5

-

ns

Write to Output in High-Z

tWHZ*

-

5-6

-

7-8

-

9

ns

LB#, UB# Valid to End of Write

tBW

6.5

-

8

-

10

-

12

-

15

-

ns

*These parameters are guaranteed by device characterization, but not production tested.

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