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AK2364 Datasheet(PDF) 4 Page - Asahi Kasei Microsystems |
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AK2364 Datasheet(HTML) 4 Page - Asahi Kasei Microsystems |
4 / 26 page [AK2364] MS1431-E-01 2012/10 - 4 - 4. Circuit Configuration Block Description MIX 2nd-mixer to convert the input signal down to 450Hz. AGC+BPF The circuit composed of AGC and BPF, where the desired signal is amplified and spurious components included in the signal from the 2nd-mixer are eliminated. Divider The circuit to divide the signal from LOIN pin and supply BPF with CLK. LIMTER The circuit to amplify the signal filtered at the AGC+BPF stage and generate rectangular wave. DISCRI The demodulator circuit with PLL FM detector, where the audio signal is recovered. LPF The Low-pass filter to eliminate the noise generated at the DISCRI stage. Noise AMP The amplifier to compose the Band-pass filter for noise squelch. Noise Rectifier The rectification circuit to detect the noise level. Comparator The circuit to compare the noise level with reference voltage level. RSSI The circuit to indicate the Received Signal Strength Indicator(RSSI) by generate a DC voltage corresponding to the input level from LIMITER. VIREF The circuit to generate internal reference voltage. LDO The circuit to supply 2.7V power for some circuits. Control Logic The control register controls the status of internal condition by serial data that consists of 1 instruction bit, 6 address bits and 8 data bits. Note: When you use AK2364 in AVDD=2.6 to 3.6V operation, VREFA pin is connected to AVDD pin for power supplying. |
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Similar Description - AK2364 |
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