LY62W1024

Rev. 1.8

128K X 8 BIT LOW POWER CMOS SRAM

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

1

®

FEATURES

Fast access time : 35/55/70ns

Low power consumption:

Operating current : 12/10/7mA (TYP.)

Standby current : 1

μA (TYP.) LL-version

0.8

μA (TYP.) SL-version

Single 2.7V ~ 5.5V power supply

All outputs TTL compatible

Fully static operation

Tri-state output

Data retention voltage : 1.5V (MIN.)

Green package available

Package : 32-pin 450 mil SOP

32-pin 600 mil P-DIP

32-pin 8mm x 20mm TSOP-I

32-pin 8mm x 13.4mm STSOP

36-ball 6mm x 8mm TFBGA

GENERAL DESCRIPTION

The LY62W1024 is a 1,048,576-bit low power

CMOS static random access memory organized as

131,072 words by 8 bits. It is fabricated using very

high performance, high reliability CMOS technology.

Its standby current is stable within the range of

operating temperature.

The LY62W1024 is well designed for very low power

system applications, and particularly well suited for

battery back-up nonvolatile memory application.

The LY62W1024 operates from a single power

supply of 2.7V ~ 5.5V and all inputs and outputs are

fully TTL compatible

PRODUCT FAMILY

Product

Family

Operating

Temperature

Vcc Range

Speed

Power Dissipation

Operating(Icc,TYP.)

LY62W1024

0 ~ 70℃

2.7 ~ 5.5V

35/55/70ns

1µA(LL)/0.8µA(SL)

12/10/7mA

LY62W1024(I)

-40 ~ 85℃

2.7 ~ 5.5V

35/55/70ns

1µA(LL)/0.8µA(SL)

12/10/7mA

FUNCTIONAL BLOCK DIAGRAM

DECODER

I/O DATA

CIRCUIT

CONTROL

CIRCUIT

128Kx8

MEMORY ARRAY

COLUMN I/O

A0-A16

Vcc

Vss

DQ0-DQ7

CE#

WE#

OE#

CE2

PIN DESCRIPTION

SYMBOL

DESCRIPTION

A0 - A16

Address Inputs

DQ0 – DQ7

Data Inputs/Outputs

CE#, CE2

Chip Enable Inputs

WE#

Write Enable Input

OE#

Output Enable Input

Power Supply

Ground

NC

No Connection