LY62W25616

Rev. 1.4

256K X 16 BIT LOW POWER CMOS SRAM

5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.

TEL: 886-3-6668838

FAX: 886-3-6668836

1

®

FEATURES

Fast access time : 55/70ns

Low power consumption:

Operating current : 30/20mA (TYP.)

Standby current : 4

μA (TYP.) LL-version

3

μA (TYP.) SL-version

Single 2.7V ~ 5.5V power supply

All outputs TTL compatible

Fully static operation

Tri-state output

Data byte control : LB# (DQ0 ~ DQ7)

UB# (DQ8 ~ DQ15)

Data retention voltage : 1.5V (MIN.)

Green package available

Package : 44-pin 400 mil TSOP-II

48-ball 6mm x 8mm TFBGA

GENERAL DESCRIPTION

The LY62W25616 is a 4,194,304-bit low power

CMOS static random access memory organized as

262,144 words by 16 bits. It is fabricated using very

high performance, high reliability CMOS technology.

Its standby current is stable within the range of

operating temperature.

The LY62W25616 is well designed for low power

application, and particularly well suited for battery

back-up nonvolatile memory application.

The LY62W25616 operates from a single power

supply of 2.7V ~ 5.5V and all inputs and outputs are

fully TTL compatible

PRODUCT FAMILY

Product

Family

Operating

Temperature

Vcc Range

Speed

Power Dissipation

Operating(Icc,TYP.)

LY62W25616

0 ~ 70℃

2.7 ~ 5.5V

55/70ns

4µA(LL)/3µA(SL)

30/20mA

LY62W25616(I)

-40 ~ 85℃

2.7 ~ 5.5V

55/70ns

4µA(LL)/3µA(SL)

30/20mA

FUNCTIONAL BLOCK DIAGRAM

CONTROL

CIRCUIT

CE#

WE#

OE#

DECODER

256Kx16

MEMORY ARRAY

COLUMN I/O

A0-A17

Vcc

Vss

DQ8-DQ15

Upper Byte

DQ0-DQ7

Lower Byte

I/O DATA

CIRCUIT

LB#

UB#

PIN DESCRIPTION

SYMBOL

DESCRIPTION

A0 - A17

Address Inputs

DQ0 – DQ15 Data Inputs/Outputs

CE#

Chip Enable Input

WE#

Write Enable Input

OE#

Output Enable Input

LB#

Lower Byte Control

UB#

Upper Byte Control

Power Supply

Ground