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LT65W64RL-25LLIT Datasheet(PDF) 5 Page - Lyontek Inc. |
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LT65W64RL-25LLIT Datasheet(HTML) 5 Page - Lyontek Inc. |
5 / 12 page LY65W64 Rev. 1.1 8K X 8 BIT HIGH SPEED CMOS SRAM Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 4 ® AC ELECTRICAL CHARACTERISTICS (1) READ CYCLE PARAMETER SYM. LY65W64-25 UNIT MIN. MAX. Read Cycle Time tRC 25 - ns Address Access Time tAA -25 ns Chip Enable Access Time tACE -25 ns Output Enable Access Time tOE -9 ns Chip Enable to Output in Low-Z tCLZ* 4 - ns Output Enable to Output in Low-Z tOLZ* 0 - ns Chip Disable to Output in High-Z tCHZ*- 9 ns Output Disable to Output in High-Z tOHZ*- 9 ns Output Hold from Address Change tOH 3- ns (2) WRITE CYCLE PARAMETER SYM. LY65W64-25 UNIT MIN. MAX. Write Cycle Time tWC 25 - ns Address Valid to End of Write tAW 20 - ns Chip Enable to End of Write tCW 20 - ns Address Set-up Time tAS 0- ns Write Pulse Width tWP 12 - ns Write Recovery Time tWR 0- ns Data to Write Time Overlap tDW 10 - ns Data Hold from End of Write Time tDH 0- ns Output Active from End of Write tOW* 6 - ns Write to Output in High-Z tWHZ* - 10 ns *These parameters are guaranteed by device characterization, but not production tested. |
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