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LY62256PL-70SLI Datasheet(PDF) 2 Page - Lyontek Inc. |
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LY62256PL-70SLI Datasheet(HTML) 2 Page - Lyontek Inc. |
2 / 14 page LY62256 Rev. 2.9 32K X 8 BIT LOW POWER CMOS SRAM Lyontek Inc. reserves the rights to change the specifications and products without notice. 5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan. TEL: 886-3-6668838 FAX: 886-3-6668836 1 ® FEATURES Fast access time : 35/55/70ns Low power consumption: Operating current : 20/15/10mA (TYP.) Standby current : 1 μA (TYP.) Single 2.7~5.5V power supply All inputs and outputs TTL compatible Fully static operation Tri-state output Data retention voltage : 1.5V (MIN.) Green package available Package : 28-pin 600 mil PDIP 28-pin 330 mil SOP 28-pin 8mm x 13.4mm STSOP 28-pin 300 mil Skinny P-DIP GENERAL DESCRIPTION The LY62256 is a 262,144-bit low power CMOS static random access memory organized as 32,768 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The LY62256 is well designed for low power application, and particularly well suited for battery back-up nonvolatile memory application. The LY62256 operates from a single power supply of 2.7~5.5V and all inputs and outputs are fully TTL compatible PRODUCT FAMILY Product Family Operating Temperature Vcc Range Speed Power Dissipation Standby(ISB1,TYP.) Operating(Icc,TYP.) LY62256 0 ~ 70℃ 2.7 ~ 5.5V 35/55/70ns 1µA 20/15/10mA LY62256(E) -20 ~ 80℃ 2.7 ~ 5.5V 35/55/70ns 1µA 20/15/10mA LY62256(I) -40 ~ 85℃ 2.7 ~ 5.5V 35/55/70ns 1µA 20/15/10mA FUNCTIONAL BLOCK DIAGRAM DECODER I/O DATA CIRCUIT CONTROL CIRCUIT 32Kx8 MEMORY ARRAY COLUMN I/O A0-A14 Vcc Vss DQ0-DQ7 CE# WE# OE# PIN DESCRIPTION SYMBOL DESCRIPTION A0 - A14 Address Inputs DQ0 – DQ7 Data Inputs/Outputs CE# Chip Enable Input WE# Write Enable Input OE# Output Enable Input VCC Power Supply VSS Ground |
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