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MP6902DS Datasheet(PDF) 8 Page - Monolithic Power Systems

Part # MP6902DS
Description  Fast Turn-off Intelligent Controller
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Manufacturer  MPS [Monolithic Power Systems]
Direct Link  http://www.monolithicpower.com
Logo MPS - Monolithic Power Systems

MP6902DS Datasheet(HTML) 8 Page - Monolithic Power Systems

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MP6902- FAST TURN-OFF INTELLIGENT CONTROLLER
MP6902 Rev. 1.13
www.MonolithicPower.com
8
1/11/2013
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2013 MPS. All Rights Reserved.
Turn-off Phase
When Vds rises to trigger the turn off threshold (-
30mV), the gate voltage is pulled to low after
about 20ns turn off delay (defined in Figure 2) by
the control circuitry. Similar with turn-on phase, a
200ns
blanking
time
is
added
after
the
synchronous MOSFET is turned off to avoid error
trigger.
Figure
3
shows
synchronous
rectification
operation at heavy load condition. Due to the
high current, the gate driver will be saturated at
first, during which the gate driver voltage is kept
at ~2V lower than VDD (when VDD>16V, gate
driver will be internal clamped at 14V). After Vds
goes to above -70mV, gate driver voltage
decreases to adjust the Vds to typical -70mV.
Figure
4
shows
synchronous
rectification
operation at light load condition. Due to the low
current, the gate driver voltage never saturates
but begins to decrease as soon as the
synchronous MOSFET is turned on and adjust
the Vds.
-70mV
-30mV
Vds
Isd
Vgs
t0
t1
t2
Figure 3—Synchronous Rectification
Operation at heavy load
-70mV
-30mV
Vds
Isd
Vgs
t0
t1
t2
Figure 4
—Synchronous Rectification
Operation at light load
Figure 5—Drain-Source and Gate Driver
voltage on SR MOFET
Figure
5
shows
the
whole
synchronous
rectification waveform on drain-source voltage
VDS and gate driver signal VGS. For safe operation
of the IC, it is required:
OUT
IN
DS _ Spike
V
V / n V
180V * k
+
+<
Where 180V is the maximum voltage rating on VD
pin of MP6902, VIN/VOUT is the input/output DC
voltage, n is the turn ratio from primary to
secondary of the power transformer, VDS_Spike is
the spike voltage on drain-source which is lead
by leakage inductance, while k is the de-rating
factor which is usually selected as 0.7~0.8.
Light-load Latch-off Function
The gate driver of MP6902 is latched to save the
driver loss at light-load condition to improve
efficiency. When the synchronous MOSFET’s
conducting period keeps lower than light load
timing (TLL) for longer than the light-load-enter
delay (TLL-Delay), MP6902 enters light-load mode
and latches off the gate driver. Here the
synchronous MOSFET’s conducting period is
from turn on of the gate driver to the moment
when VGS drops to below 1V (VLL_GS). During
light-load
mode,
MP6902
monitors
the
synchronous MOSFET’s body diode conducting
period by sensing the time duration of the VDS
below -250mV(VLL_DS). If it is longer than TLL+TLL-
H (TLL-H, light-load-enter pulse width hysteresis),
the light-load mode is finished and gate driver of
MP6902 is unlatched to restart the synchronous
rectification.


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