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AK8181E Datasheet(PDF) 4 Page - Asahi Kasei Microsystems |
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AK8181E Datasheet(HTML) 4 Page - Asahi Kasei Microsystems |
4 / 10 page AK8181E Feb-2013 draft-E-01 - 4 - DC Characteristics (LVCMOS/LVTTL) All specifications at VDD= 3.3V 5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol Conditions MIN TYP MAX Unit Input High Voltage VIH 2.0 VDD+0.3 V Input Low Voltage VIL -0.3 0.8 V Input High Current CLK_SEL IH Vin=VDD=3.465V 150 μA CLK_EN Vin=VDD=3.465V 5 μA Input Low Current CLK_SEL IL Vin=VSS, VDD=3.465V -5 μA CLK_EN Vin=VSS, VDD=3.465V -150 μA DC Characteristics (Differential) All specifications at VDD= 3.3V 5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol Conditions MIN TYP MAX Unit Input High Current PCLKp IH Vin=VDD=3.465V 150 μA PCLKn Vin=VDD=3.465V 5 μA Input Low Current PCLKp IL Vin=VSS, VDD=3.465V -5 μA PCLKn Vin=VSS, VDD=3.465V -150 μA Peak-to-Peak Input Voltage VPP 0.15 1.3 V Common Mode Input Voltage (1) (2) VCMR VSS+0.5 VDD-0.85 V (1) For single ended applications, the maximum input voltage for PCLKp and PCLKn is VDD+0.3V. (2) Common mode voltage is defined as VIH. DC Characteristics (LVPECL) All specifications at VDD= 3.3V 5%, Ta: -40 to +85℃, unless otherwise noted Parameter Symbol Conditions MIN TYP MAX Unit Output High Voltage (3) VOH VDD-1.4 VDD-0.9 V Output Low Voltage (3) VOL VDD-2.0 VDD-1.7 V Peak-to-Peak Output Voltage Swing VSWING 0.6 1.0 V (3) Outputs terminated with 50 Ω to VDD-2V. |
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