Application Notes

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Using the Standby Function on the PT6650 Series

of 12/24-V Input Bus Converters

For applications requiring output voltage On/Off control,

the 14-pin PT6650 ISR series incorporates a standby

function. This feature may be used for power-up/shut-

down sequencing, and wherever there is a requirement

for the output status of the module to be controlled by

external circuitry.

The standby function is provided by the STBY* control,

pin 3. If pin 3 is left open-circuit the regulator operates

normally, providing a regulated output whenever a valid

disable the regulator output and reduce the input current

also hold-off the regulator output during the period that

input power is applied.

The standby input is ideally controlled with an open-drain

discrete transistor (See Figure 2-1). It can also be driven

provides details of the threshold requirements.

Parameter

Min

Max

1 V

5 V

–0.1 V

0.3 V

Notes:

1. The Standby input on the PT6650 regulator series may be

controlled using either an open-collector (or open-drain)

discrete transistor, or a device with a totem-pole output. A

pull-up resistor is not necessary. The control input has an

open-circuit voltage of about 1.5 Vdc. To disable the

regulator output, the control pin must be “pulled” to less

than 0.3 Vdc with a low-level 0.25 mA maximum sink to

ground.

2. The Standby input on the PT6650 series is also compatible

with TTL logic. A standard TTL logic gate will meet the

current. Do not drive the Standby control input above 5 Vdc.

3. When the regulator output is disabled the current drawn

from the input source is reduced to approximately 15 mA

(30 mA maximum).

periods up to 100 ms will not damage the regulator. However,

a slow turn-off time will increase both the initial delay and

rate-of-rise of the output voltage.

Figure 2-1

Turn-On Time:

low-voltage signal at pin 3 and enables the output. The

PT6650 series of regulators will provide a fully regulated out-

put voltage within 12 ms. The actual turn-on time may

vary with load and the total amount of output capacitance.

Figure 2-2 shows the typical output voltage waveform of a

t =0 secs. The waveform was measured with a 24 V input

voltage, and 5 A resistive load.

Figure 2-2

C

in

+

C

out

+

Inhibit

V

in

V

o

COM

COM

Q1

BSS138

+5V V

in

PT6650

11,12,13

14

7,8,9,10

4,5,6

Vin

Vo

GND

Vo(adj)

STBY

3

Vsense

1

PT6650 Series

0

2468

10

12

t (milli - secs)