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AAT2601AIIH-3.3-T1 Datasheet(PDF) 3 Page - Skyworks Solutions Inc. |
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AAT2601AIIH-3.3-T1 Datasheet(HTML) 3 Page - Skyworks Solutions Inc. |
3 / 38 page 3 AAT2601/2601A DATA SHEET Total Power Solution for Portable Applications Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com 202179B • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice. • March 19, 2013 Pin Descriptions Pin # Symbol Function 1 EN_TEST Similar to EN_HOLD but intended for use with the automatic tester or as a hands free enable input pin indi- cating hands free phone operation with a headset. It is also internally pulled to GND when floating. 2 EN_HOLD Enable for the system. EN_HOLD must be held high by the processor to maintain core power. It is inter- nally pulled to GND when floating. 3 EN_KEY Enable for the system. An internal pull-up resistor keeps the pin pulled up to an internal supply to keep the system off when there is no CHGIN input. Connect a normally-open pushbutton switch from this pin to GND. There is an internal 300ms debounce delay circuit to filter noise. 4 ON_KEY Buffered logic output of the EN_KEY pin with a logic signal from ground to OUT1. 5 EN2 Enable for LDO2 (PowerAnalog or PLL). (Internally pulled low when floating) 6 EN3 Enable for LDO3 (TCXO). (Internally pulled low when floating) 7 EN4 Enable for LDO4 (TX) (Internally pulled low when floating) 8 EN5 Enable for LDO5 (RX) (Internally pulled low when floating) 9 OUT5 Output for LDO5 (RX) (when shut down, pulled down with 10kΩ) 10 OUT4 Output for LDO4 (TX) (when shut down, pulled down with 10kΩ) 11 AVIN2 Analog voltage input. Must be tied to SYSOUT on the PCB. 12 OUT3 Output for LDO3 (TCXO) 13 OUT2 Output for LDO2 (PowerAnalog) 14 AVIN1 Analog voltage input. Must be tied to SYSOUT on the PCB. 15 OUT1 Output for LDO1 (PowerDigital) 16 AGND Signal ground 17 CNOISE Noise Bypass pin for the internal reference voltage. Connect a 0.01μF capacitor to AGND. 18 RESET RESET is the open drain output of a 65ms reset timer. RESET is released after the 50ms timer times out. RESET is active low and is held low during shutdown. RESET should be tied to a 10K or larger pullup to OUTBUCK. 19 ADPP Open Drain output. Will pull low when VCHGIN > 4.5V. When this happens, depending on the status of the USE_USB pin, the charge current will be reset to the default values (see Battery Charger and I2C Serial Interface and Programmability section) 20 LX Step-down Buck converter (Core) switching node. Connect an inductor between this pin and the output. 21 PGND Power Ground for step-down Buck converter (Core) 22 PVIN Input power for step-down Buck converter (Core). Must be tied to SYSOUT. 23 OUTBUCK Feedback input for the step-down Buck converter (Core) 24, 25 SYSOUT System Power output. Connect to the input voltage pins PIN, AVIN1/2 for the step-down converter and LDOs and other external supply requirements. 26, 27 BAT Connect to a Lithium Ion battery. 28 CHGIN Power input from either external adapter or USB port. 29 USE_USB When pulled high, fast charge current is set to 100mA regardless of the resistor value present on the ISET pin. Additionally, the CHGIN-SYSOUT LDO will be disabled and the BAT-SYSOUT load switch will be enabled. 30 ENBAT Active low enable for the battery charger (Internally pulled low when floating) 31 TS Battery Temperature Sense pin with 75μA output current. Connect the battery’s NTC resistor to this pin and ground. 32 ISET Charge current programming input pin (Tie a 1k to GND for maximum fast charge current). Can be used to monitor charge current. 33 CT Charger Safety Timer Pin. A 0.1μF ceramic capacitor should be connected between this pin and GND. Con- nect directly to GND to disable the timer function. 34 STAT Battery charging status pin output. Connected internally between GND and OUT1 (PowerDigital). Used to monitor battery charge status. 35 SDA I2C serial data pin, open drain; requires a pullup resistor. 36 SCL I2C serial clock pin, open drain; requires a pullup resistor. EP EP The exposed thermal pad (EP) must be connected to board ground plane and pins 16 and 21. The ground plane should include a large exposed copper pad under the package for thermal dissipation (see package outline). |
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