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AM27C040-150DC Datasheet(PDF) 1 Page - Advanced Micro Devices |
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AM27C040-150DC Datasheet(HTML) 1 Page - Advanced Micro Devices |
1 / 13 page FINAL Publication# 14971 Rev: G Amendment/0 Issue Date: May 1998 Am27C040 4 Megabit (512 K x 8-Bit) CMOS EPROM DISTINCTIVE CHARACTERISTICS s Fast access time — Available in speed options as fast as 90 ns s Low power consumption — <10 µA typical CMOS standby current s JEDEC-approved pinout — Plug-in upgrade for 1 Mbit and 2 Mbit EPROMs — Easy upgrade from 28-pin JEDEC EPROMs s Single +5 V power supply s ±10% power supply tolerance standard s 100% Flashrite™ programming — Typical programming time of 1 minute s Latch-up protected to 100 mA from –1 V to VCC + 1 V s High noise immunity s Compact 32-pin DIP, PDIP, PLCC packages GENERAL DESCRIPTION The Am27C040 is a 4 Mbit ultraviolet erasable pro- grammable read-only memory. It is organized as 512K bytes, operates from a single +5 V supply, has a static standby mode, and features fast single address loca- tion programming. The device is available in windowed ceramic DIP packages and plastic one-time program- mable (OTP) packages. Data can be typically accessed in less than 90 ns, al- lowing high-performance microprocessors to operate without any WAIT states. The device offers separate Output Enable (OE#) and Chip Enable (CE#) controls, thus eliminating bus contention in a multiple bus micro- processor system. AMD’s CMOS process technology provides high speed, low power, and high noise immunity. Typical power consumption is only 100 mW in active mode, and 50 µW in standby mode. All signals are TTL levels, including programming sig- nals. Bit locations may be programmed singly, in blocks, or at random. The device supports AMD’s Flashrite programming algorithm (100 µs pulses) re- sulting in typical programming time of 1 minute. BLOCK DIAGRAM 14971G-1 A0–A18 Address Inputs CE#/PGM# OE# VCC VSS VPP Data Outputs DQ0–DQ7 Output Buffers Y Gating 4,194,304-Bit Cell Matrix X Decoder Y Decoder Output Enable Chip Enable and Prog Logic |
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