NB638–HIGH EFFICIENCY, FAST TRANSIENT SYNCHRONOUS STEP-DOWN CONVERTER

NB638 Rev.1.16

www.MonolithicPower.com

11

4/18/2012

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2012 MPS. All Rights Reserved.

SW

ON

ESR

OUT

TT

0.7

2

R

C

+

×π

≥

(4)

Tsw is the switching period.

Ramp with small ESR Cap

When the output capacitors are ceramic ones,

the ESR ripple is not high enough to stabilize the

system, and external ramp compensation is

needed. Skip to application information section

for design steps with small ESR caps.

R1

R2

Ceramic

SW

FB

Vo

L

R4

C4

R9

Figure 7—Simplified Circuit in PWM Mode

with External Ramp Compensation

In PWM mode, an equivalent circuit with HS-FET

off

and

the

use

of

an

external

ramp

compensation circuit (R4, C4) is simplified in

Figure 7. The external ramp is derived from the

inductor ripple current. If one chooses C4, R9,

R1 and R2 to meet the following condition:

12

9

SW

4

1

2

RR

11

R

2F

C

5

R

R

⎛⎞

×

<×

+

⎜⎟

π×

×

+

⎝⎠

(5)

Where:

R4

C4

FB

C4

II

II

=+≈

(6)

as:

IN

O

12

RAMP

ON

44

1

2

9

VV

R//R

VT

RC

R // R

R

−

=×

×

×+

(7)

follows

−

−

==

×

OUT

RAMP

SLOPE1

off

4

4

V

V

V

TR

C

(8)

As can be seen from equation 8, if there is

instability in PWM mode, we can reduce either

R4 or C4. If C4 can not be reduced further due to

limitation from equation 5, then we can only

reduce R4. For a stable PWM operation, the

3

10

SW

ON

ESR

OUT

slope1

OUT

OUT

SW

on

TT

+-R

C

Io

0.7 π

2

-V

V

+

2L C

T -T

−

×

×

≥

××

(9)

Io is the load current.

ripple is almost the same whether the external

ramp is used or not. Fig.9 shows the simplified

circuit of the skip mode when both the HS-FET

and LS-FET are off.

R1

R2

Cout

FB

Vo

Ro

Figure 8—Simplified Circuit in skip Mode

mode can be determined as follow:

()

REF

SLOPE2

12

OUT

V

V

(R

R // Ro) C

−

=

+×

(10)

Where Ro is the equivalent load resistor.

lower than that is in the PWM mode, so it is

reasonable that the jitter in the skip mode is

larger. If one wants a system with less jitter

during ultra light load condition, the values of the

will decrease the light load efficiency.

Soft Start/Stop

The

NB638

employs

soft

start/stop

(SS)

mechanism to ensure smooth output during

power-up and power shutdown. When the EN pin

becomes high, an internal current source (8.5μA)

charges up the SS CAP. The SS CAP voltage

takes over the REF voltage to the PWM

comparator. The output voltage smoothly ramps