ADuM1301CRWZ datasheet(7/32 Pages) AD

Part #	ADuM1301CRWZ

Description	Triple-Channel Digital Isolators

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Data Sheet

ADuM1300/ADuM1301

Rev. I | Page 7 of 32

Parameter

Symbol

Min

Typ

Max

Unit

Test Conditions

ADuM130xBRW

Minimum Pulse Width2

PW

100

ns

CL = 15 pF, CMOS signal levels

Maximum Data Rate3

10

Mbps

CL = 15 pF, CMOS signal levels

Propagation Delay4

tPHL, tPLH

20

38

50

ns

CL = 15 pF, CMOS signal levels

Pulse Width Distortion, |tPLH − tPHL|4

PWD

3

ns

CL = 15 pF, CMOS signal levels

Change vs. Temperature

5

ps/°C

CL = 15 pF, CMOS signal levels

Propagation Delay Skew5

tPSK

26

ns

CL = 15 pF, CMOS signal levels

Channel-to-Channel Matching, Codirectional

Channels6

tPSKCD

3

ns

CL = 15 pF, CMOS signal levels

Channel-to-Channel Matching, Opposing-

Directional Channels6

tPSKOD

6

ns

CL = 15 pF, CMOS signal levels

ADuM130xCRW

Minimum Pulse Width2

PW

8.3

11.1

ns

CL = 15 pF, CMOS signal levels

Maximum Data Rate3

90

120

Mbps

CL = 15 pF, CMOS signal levels

Propagation Delay4

tPHL, tPLH

20

34

45

ns

CL = 15 pF, CMOS signal levels

Pulse Width Distortion, |tPLH − tPHL|4

PWD

0.5

2

ns

CL = 15 pF, CMOS signal levels

Change vs. Temperature

3

ps/°C

CL = 15 pF, CMOS signal levels

Propagation Delay Skew5

tPSK

16

ns

CL = 15 pF, CMOS signal levels

Channel-to-Channel Matching, Codirectional

Channels6

tPSKCD

2

ns

CL = 15 pF, CMOS signal levels

Channel-to-Channel Matching, Opposing-

Directional Channels6

tPSKOD

5

ns

CL = 15 pF, CMOS signal levels

For All Models

Output Disable Propagation Delay (High/Low to

High Impedance)

tPHZ, tPLH

6

8

ns

CL = 15 pF, CMOS signal levels

Output Enable Propagation Delay (High

Impedance to High/Low)

tPZH, tPZL

6

8

ns

CL = 15 pF, CMOS signal levels

Output Rise/Fall Time (10% to 90%)

tR/tF

3

ns

CL = 15 pF, CMOS signal levels

Common-Mode Transient Immunity at

Logic High Output7

|CMH|

25

35

kV/μs

VIx = VDD1 or VDD2, VCM = 1000 V,

transient magnitude = 800 V

Common-Mode Transient Immunity at

Logic Low Output7

|CML|

25

35

kV/μs

VIx = 0 V, VCM = 1000 V,

transient magnitude = 800 V

Refresh Rate

fr

1.1

Mbps

Input Dynamic Supply Current per Channel8

IDDI (D)

0.10

mA/Mbps

Output Dynamic Supply Current per Channel8

IDDO (D)

0.03

mA/Mbps

1 The supply current values are for all three channels combined when running at identical data rates. Output supply current values are specified with no output load

present. The supply current associated with an individual channel operating at a given data rate may be calculated as described in the

section.

See

through Figure 8 for information on per-channel supply current as a function of data rate for unloaded and loaded conditions. See

through

for total VDD1 and VDD2 supply currents as a function of data rate for ADuM1300/ADuM1301 channel configurations.

Power Consumption

Figure 6

Figure 9

Figure 12

2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.

3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.

4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is

measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.

5 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load

within the recommended operating conditions.

6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of

the isolation barrier. Opposing-directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with

inputs on opposing sides of the isolation barrier.

7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum common-mode voltage slew rate

that can be sustained while maintaining VO < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The transient

magnitude is the range over which the common mode is slewed.

8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in signal data rate. See

through

for information

on per-channel supply current for unloaded and loaded conditions. See the

section for guidance on calculating the per-channel supply current

for a given data rate.

Figure 8

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