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EDE2108AEBG-8E-F Datasheet(PDF) 9 Page - Elpida Memory |
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EDE2108AEBG-8E-F Datasheet(HTML) 9 Page - Elpida Memory |
9 / 73 page EDE2108AEBG Data Sheet E1950E11 (Ver.1.1) 9 Parameter Symbol Grade max. Unit Test condition Self-refresh current IDD6* 7 12 mA Self-Refresh Mode; CK and /CK at 0V; CKE 0.2V; Other control and address bus inputs are FLOATING; Data bus inputs are FLOATING Operating current (Bank interleaving) IDD7 170 mA all bank interleaving reads, IOUT = 0mA; BL = 4, CL = CL(IDD), AL = tRCD (IDD) 1 tCK (IDD); tCK = tCK (IDD), tRC = tRC (IDD), tRRD = tRRD (IDD), tFAW = tFAW (IDD), tRCD = 1 tCK (IDD); CKE is H, /CS is H between valid commands; Address bus inputs are STABLE during DESELECTs; Data pattern is same as IDD4W; Notes: 1. IDD specifications are tested after the device is properly initialized. 2. Input slew rate is specified by AC Input Test Condition. 3. IDD parameters are specified with ODT disabled. 4. Data bus consists of DQ, DM, DQS, /DQS, RDQS and /RDQS. IDD values must be met with all combinations of EMRS bits 10 and 11. 5. Definitions for IDD L is defined as VIN VIL (AC) (max.) H is defined as VIN VIH (AC) (min.) STABLE is defined as inputs stable at an H or L level FLOATING is defined as inputs at VREF = VDDQ/2 SWITCHING is defined as: inputs changing between H and L every other clock cycle (once per two clocks) for address and control signals, and inputs changing between H and L every other data transfer (once per clock) for DQ signals not including masks or strobes. 6. Refer to AC Timing for IDD Test Conditions. 7. IDD6 will increase by 80% if TC ≥ +85°C and high temperature self-refresh rate option is enabled. |
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