W29GL032CB7T datasheet(5/68 Pages) WINBOND

Part #	W29GL032CB7T

Description	32M-BIT 3.0-VOLT PARALLEL FLASH MEMORY WITH PAGE MODE

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Manufacturer	WINBOND [Winbond]

Direct Link	http://www.winbond.com

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W29GL032C

Publication Release Date: August 2, 2013

iii

Revision H

List of Figures

Figure 3-1

LFBGA64 TOP VIEW (FACE DOWN) ........................................................................... 2

Figure 3-2

56-PIN STANDARD TSOP (TOP VIEW) ........................................................................ 2

Figure 3-3

TFBGA48 TOP VIEW (FACE DOWN)............................................................................ 2

Figure 3-4

48-PIN STANDARD TSOP (TOP VIEW) ........................................................................ 2

Figure 4-1

Block Diagram................................................................................................................. 3

Figure 7-1

Enhanced Sector Protect/Un-protect IPB Program Algorithm ...................................... 15

Figure 7-2

Lock Register Program Algorithm................................................................................. 16

Figure 7-3

IPB Program Algorithm ................................................................................................. 18

Figure 8-1

Maximum Negative Overshoot ..................................................................................... 29

Figure 8-2

Maximum Positive Overshoot ....................................................................................... 29

Figure 8-3

Switch Test Circuit ........................................................................................................ 31

Figure 8-4

Switching Test Waveform ............................................................................................. 31

Figure 8-5

Instruction Write Operation Waveform.......................................................................... 33

Figure 8-6

Read Timing Waveform ................................................................................................ 34

Figure 8-7

#RESET Timing Waveform........................................................................................... 35

Figure 8-8

Automatic Chip Erase Timing Waveform...................................................................... 36

Figure 8-9

Automatic Chip Erase Algorithm Flowchart .................................................................. 37

Figure 8-10

Automatic Sector Erase Timing Waveform................................................................... 38

Figure 8-11

Automatic Sector Erase Algorithm Flowchart ............................................................... 39

Figure 8-12

Erase Suspend/Resume Flowchart .............................................................................. 40

Figure 8-13

Automatic Program Timing Waveform.......................................................................... 41

Figure 8-14

Accelerated Program Timing Waveform....................................................................... 41

Figure 8-15

#CE Controlled Write Timing Waveform....................................................................... 42

Figure 8-16

#WE Controlled Write Timing Waveform ...................................................................... 43

Figure 8-17

Automatic Programming Algorithm Flowchart .............................................................. 44

Figure 8-18

Silicon ID Read Timing Waveform................................................................................ 45

Figure 8-19

Data# Polling Timing Waveform (During Automatic Algorithms) .................................. 46

Figure 8-20

Status Polling for Word Programming/Erase ................................................................ 47

Figure 8-21

Status Polling for Write Buffer Program Flowchart ....................................................... 48

Figure 8-22

Toggling Bit Timing Waveform (During Automatic Algorithms) .................................... 49

Figure 8-23

Toggle Bit Algorithm...................................................................................................... 50

Figure 8-24

#BYTE Timing Waveform For Read operations ........................................................... 51

Figure 8-25

Page Read Timing Waveform....................................................................................... 51

Figure 8-26

Deep Power Down mode Waveform ............................................................................ 52

Figure 8-27

Write Buffer Program Flowchart ................................................................................... 52

Figure 8-28

AC Timing at Device Power-Up .................................................................................... 53

Figure 9-1

TSOP 48-pin 12x20mm ................................................................................................ 55

Figure 9-2

TSOP 56-pin 14x20mm ................................................................................................ 56

Figure 9-3

LFBGA 64-ball 11x13mm ............................................................................................. 57

Figure 9-4

TFBGA 48-Ball 6x8mm ................................................................................................. 58

Figure 10-1

Ordering Part Numbering.............................................................................................. 59

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