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TC7USB40MU Datasheet(PDF) 1 Page - Toshiba Semiconductor

Part No. TC7USB40MU
Description  CMOS Digital Integrated Circuits Silicon Monolithic
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Maker  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
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TC7USB40MU
1
CMOS Digital Integrated Circuits Silicon Monolithic
TC7USB40MU
TC7USB40MU
TC7USB40MU
TC7USB40MU
1.
1.
1.
1. Functional Description
Functional Description
Functional Description
Functional Description
Dual SPDT USB Switch
2.
2.
2.
2. General
General
General
General
The TC7USB40MU is high-speed CMOS dual 1-2 multiplexer/demultiplexer. The low ON-resistance and the low
capacitance of the switch allow connections to USB2.0 (480Mbps) application.
This device consists of dual individual two-inputs multiplexer/demultiplexer with common select input (S) and
output enable (OE). The D+/D- inputs is connected to the 1D+/1D- or 2D+/2D- outputs determined by the
combination both the select input (S) and output enable (OE). When the output enable (OE) input is held high
level, the switches are open with regardless the state of select inputs and a high-impedance state exists between
the switches.
All inputs are equipped with protection circuits against static discharge.
3.
3.
3.
3. Features
Features
Features
Features
(1)
Supply voltage: VCC = 2.3 to 4.3 V
(2)
Switch terminal ON-capacitance: CI/O = 5 pF Switch ON (typ.) @VCC = 3.3 V
(3)
ON-resistance: RON = 4.5 Ω (typ.) @VCC = 3 V, VIS = 0 V
(4)
RON flatness: RON(flat) = 1.3 Ω (typ.)@VCC = 3 V
(5)
Difference of ON-resistance between switches: ∆RON = 0.35 Ω (typ.)@VCC = 3 V
(6)
ESD performance: Machine model ≥ ±200 V, Human body model ≥ ±8000 V
(7)
Power-down protection provided on all inputs and outputs.
(8)
Ultra-small Package: UQFN10
4.
4.
4.
4. Packaging and Pin Assignment
Packaging and Pin Assignment
Packaging and Pin Assignment
Packaging and Pin Assignment
UQFN10
2012-09-27
Rev.1.0




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