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74LVCE1G125FZ4-7 Datasheet(PDF) 7 Page - Diodes Incorporated |
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74LVCE1G125FZ4-7 Datasheet(HTML) 7 Page - Diodes Incorporated |
7 / 14 page 74LVCE1G125 SINGLE BUFFER GATE WITH 3-STATE OUTPUT 74LVCE1G125 Document number: DS32216 Rev. 2 - 2 7 of 14 www.diodes.com December 2010 © Diodes Incorporated Parameter Measurement Information Vcc Inputs VM CL RL VI tr/tf 1.5V±0.1V VCC ≤2ns VCC/2 15pF 1M Ω 1.8V±0.15V VCC ≤2ns VCC/2 15pF 1M Ω 2.5V±0.2V VCC ≤2ns VCC/2 15pF 1M Ω 3.3V±0.3V 3V ≤2.5ns 1.5V 15pF 1M Ω 5V±0.5V VCC ≤2.5ns VCC/2 15pF 1M Ω Voltage Waveform Enable and Disable Times Low and High Level Enabling Voltage Waveform Pulse Duration Voltage Waveform Propagation Delay Times Inverting and Non Inverting Outputs Notes: A. Includes test lead and test apparatus capacitance. B. All pulses are supplied at pulse repetition rate ≤ 10 MHz. C. Inputs are measured separately one transition per measurement. D. tPLZ and tPHZ are the same as tdis. E. tPZL and tPZH are the same as tEN. F. tPLH and tPHL are the same as tPD. Figure 1. Load Circuit and Voltage Waveforms TEST S1 tPLH/tPHL Open tPLZ/tPZL Vload tPHZ/tPZH GND |
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