Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

NB3N51034 Datasheet(PDF) 5 Page - ON Semiconductor

Part # NB3N51034
Description  Quad HCSL/LVDS Clock Generator
Download  9 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NB3N51034 Datasheet(HTML) 5 Page - ON Semiconductor

  NB3N51034 Datasheet HTML 1Page - ON Semiconductor NB3N51034 Datasheet HTML 2Page - ON Semiconductor NB3N51034 Datasheet HTML 3Page - ON Semiconductor NB3N51034 Datasheet HTML 4Page - ON Semiconductor NB3N51034 Datasheet HTML 5Page - ON Semiconductor NB3N51034 Datasheet HTML 6Page - ON Semiconductor NB3N51034 Datasheet HTML 7Page - ON Semiconductor NB3N51034 Datasheet HTML 8Page - ON Semiconductor NB3N51034 Datasheet HTML 9Page - ON Semiconductor  
Zoom Inzoom in Zoom Outzoom out
 5 / 9 page
background image
NB3N51034
http://onsemi.com
5
Table 7. AC ELECTRICAL CHARACTERISTICS − PCI EXPRESS JITTER SPECIFICATIONS,
VDD = 3.3 V ± 5%, TA = −40°C to 85°C
Symbol
Parameter
Test Conditions
Min
Typ
Max
PCIe
Industry
Spec
Unit
tj (PCIe Gen 1)
Phase Jitter
Peak−to−Peak
(Notes 16
and 19)
f = 100 MHz, 25 MHz Crystal
Input Evaluation Band:
0 Hz − Nyquist (clock
frequency/2)
SSOFF
10
20
86
ps
SSON
(−0.5%)
19
28
tREFCLK_HF_RMS
(PCIe Gen 2)
Phase Jitter
RMS (Notes 17
and 19)
f = 100 MHz, 25 MHz Crystal
Input High Band:
1.5 MHz − Nyquist (clock
frequency/2)
SSOFF
1.0
1.8
3.1
ps
SSON
(−0.5%)
1.1
1.9
tREFCLK_LF_RMS
(PCIe Gen 2)
Phase Jitter
RMS (Notes 17
and 19)
f = 100 MHz, 25 MHz Crystal
Input Low Band:
10 kHz − 1.5 MHz
SSOFF
0.1
0.15
3.0
ps
SSON
(−0.5%)
0.8
1.1
tREFCLK_RMS
(PCIe Gen 3)
Phase Jitter
RMS (Notes 18
and 19)
f = 100 MHz, 25 MHz Crystal
Input Evaluation Band: 0 Hz −
Nyquist (clock frequency/2)
SSOFF
0.35
0.7
1.0
ps
SSON
(−0.5%)
0.55
0.8
15.Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
16.Peak−to−Peak jitter after applying system transfer function for the Common Clock Architecture. Maximum limit for PCI Express Gen 1 is 86 ps
peak−to−peak for a sample size of 106 clock periods.
17.RMS jitter after applying the two evaluation bands to the two transfer functions defined in the Common Clock Architecture and reporting the
worst case results for each evaluation band. Maximum limit for PCI Express Generation 2 is 3.1 ps RMS for tREFCLK_HF_RMS (High Band)
and 3.0ps RMS for tREFCLK_LF_RMS (Low Band).
18.RMS jitter after applying system transfer function for the common clock architecture.
19.Measurement taken from differential output on single−ended channel terminated with RS = 33.2 W, RL = 50 W, with test load capacitance
of 2 pF and current biasing resistor set at 475 W. See Figure 5. This parameter is guaranteed by characterization. Not tested in production.


Similar Part No. - NB3N51034

ManufacturerPart #DatasheetDescription
logo
ON Semiconductor
NB3N51034 ONSEMI-NB3N51034 Datasheet
440Kb / 12P
   Quad HCSL/LVDS Clock Generator
September, 2017 ??Rev. 3
NB3N51034DTG ONSEMI-NB3N51034DTG Datasheet
440Kb / 12P
   Quad HCSL/LVDS Clock Generator
September, 2017 ??Rev. 3
NB3N51034DTR2G ONSEMI-NB3N51034DTR2G Datasheet
440Kb / 12P
   Quad HCSL/LVDS Clock Generator
September, 2017 ??Rev. 3
NB3N51034 ONSEMI-NB3N51034_17 Datasheet
440Kb / 12P
   Quad HCSL/LVDS Clock Generator
September, 2017 ??Rev. 3
More results

Similar Description - NB3N51034

ManufacturerPart #DatasheetDescription
logo
ON Semiconductor
NB3N51034 ONSEMI-NB3N51034_17 Datasheet
440Kb / 12P
   Quad HCSL/LVDS Clock Generator
September, 2017 ??Rev. 3
NB3N51044 ONSEMI-NB3N51044_17 Datasheet
219Kb / 13P
   Quad HCSL / LVDS Clock Generator
September, 2017 ??Rev. 2
NB3N51054 ONSEMI-NB3N51054_18 Datasheet
164Kb / 15P
   Quad HCSL/LVDS PCIe Clock Generator
May, 2018 ??Rev. 5
NB3N51032 ONSEMI-NB3N51032 Datasheet
290Kb / 13P
   Dual HCSL/LVDS Clock Generator
July, 2014 ??Rev. 1
NB3N51032 ONSEMI-NB3N51032_16 Datasheet
292Kb / 13P
   Dual HCSL/LVDS Clock Generator
April, 2016 ??Rev. 2
NB3N51032 ONSEMI-NB3N51032_17 Datasheet
612Kb / 13P
   Dual HCSL/LVDS Clock Generator
September, 2017 ??Rev. 3
NB3N3002 ONSEMI-NB3N3002_17 Datasheet
87Kb / 8P
   HCSL Clock Generator
May, 2017 ??Rev. 7
NB3N3002 ONSEMI-NB3N3002_13 Datasheet
126Kb / 8P
   HCSL Clock Generator
October, 2013 ??Rev. 6
logo
Integrated Device Techn...
8413S12B IDT-8413S12B Datasheet
845Kb / 33P
   HCSL/ LVCMOS Clock Generator
logo
Maxim Integrated Produc...
DS4100H MAXIM-DS4100H Datasheet
128Kb / 6P
   100MHz HCSL Clock Generator
Rev 0; 11/07
More results


Html Pages

1 2 3 4 5 6 7 8 9


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com