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NCP1249AD65R2G Datasheet(PDF) 3 Page - ON Semiconductor |
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NCP1249AD65R2G Datasheet(HTML) 3 Page - ON Semiconductor |
3 / 31 page NCP1249A, NCP1249B http://onsemi.com 3 Figure 2. Internal Circuit Architecture Q Q 65 kHz VDD modulation VCC DRV Vcc management, Rramp LEB vdd RFB IpFlag 4ms SS GND CS FB 600 ns time constant OPP/ Latch foldback Vskip Vlatch The soft−start is activated during : −the startup sequence + Vlimit Vfold S R Q Q Clamp 20 constant VOVP 1 s blanking 4 hiccup OVP gone ? UVLO HV X2 REM TSD HV startup POR Frequency IpFlag logic and fault timer X2 timer Remote timer 300 mV peak Current freeze Vdd /PWM_ ON Brown−out R S R Q Q BO _OK Frequency clock BO _bias EN −the auto−recovery burst mode VOPP Vlimit + VOPP RST Resets if Vcc < 3 V s time S R Up counter Idischarge VHV REM timer X2 & Vcc discharge |
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Similar Description - NCP1249AD65R2G |
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