A29040A-90 datasheet(7/30 Pages) AMICC

Part #	A29040A-90

Description	512K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory

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Manufacturer	AMICC [AMIC Technology]

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A29040A Series

PRELIMINARY

(August, 2001, Version 0.1)

7

AMIC Technology, Inc.

Command Definitions

Writing specific address and data commands or sequences

into the command register initiates device operations. The

Command Definitions table defines the valid register

command sequences. Writing incorrect address and data

values or writing them in the improper sequence resets the

device to reading array data.

All addresses are latched on the falling edge of

WE or CE ,

whichever happens later. All data is latched on the rising

edge of

WE or CE , whichever happens first. Refer to the

appropriate timing diagrams in the "AC Characteristics"

section.

Reading Array Data

The device is automatically set to reading array data after

device power-up. No commands are required to retrieve

data. The device is also ready to read array data after

completing an Embedded Program or Embedded Erase

algorithm. After the device accepts an Erase Suspend

command, the device enters the Erase Suspend mode. The

system can read array data using the standard read timings,

except that if it reads at an address within erase-suspended

sectors, the device outputs status data. After completing a

programming operation in the Erase Suspend mode, the

system may once again read array data with the same

exception. See "Erase Suspend/Erase Resume Commands"

for more information on this mode.

The system must issue the reset command to re-enable the

device for reading array data if I/O5 goes high, or while in the

autoselect mode. See the "Reset Command" section, next.

See also "Requirements for Reading Array Data" in the

"Device Bus Operations" section for more information. The

Read Operations table provides the read parameters, and

Read Operation Timings diagram shows the timing diagram.

Reset Command

Writing the reset command to the device resets the device to

reading array data. Address bits are don't care for this

command. The reset command may be written between the

sequence cycles in an erase command sequence before

erasing begins. This resets the device to reading array data.

Once erasure begins, however, the device ignores reset

commands until the operation is complete.

The reset command may be written between the sequence

cycles

in

a

program

command

sequence

before

programming begins. This resets the device to reading array

data (also applies to programming in Erase Suspend mode).

Once programming begins, however, the device ignores

reset commands until the operation is complete.

The reset command may be written between the sequence

cycles in an autoselect command sequence. Once in the

autoselect mode, the reset command must be written to

return to reading array data (also applies to autoselect

during Erase Suspend).

If I/O5 goes high during a program or erase operation, writing

the reset command returns the device to reading array data

(also applies during Erase Suspend).

Autoselect Command Sequence

The autoselect command sequence allows the host system

to access the manufacturer and devices codes, and

determine whether or not a sector is protected. The

Command Definitions table shows the address and data

requirements. This method is an alternative to that shown in

the Autoselect Codes (High Voltage Method) table, which is

intended for PROM programmers and requires VID on

address bit A9.

The autoselect command sequence is initiated by writing two

unlock cycles, followed by the autoselect command. The

device then enters the autoselect mode, and the system

may read at any address any number of times, without

initiating another command sequence.

A read cycle at address XX00h retrieves the manufacturer

code and another read cycle at XX11h retrieves the

continuation code. A read cycle at address XX01h returns

the device code. A read cycle containing a sector address

(SA) and the address 02h in returns 01h if that sector is

protected, or 00h if it is unprotected. Refer to the Sector

Address tables for valid sector addresses.

The system must write the reset command to exit the

autoselect mode and return to reading array data.

Byte Program Command Sequence

Programming is a four-bus-cycle operation. The program

command sequence is initiated by writing two unlock write

cycles, followed by the program set-up command. The

program address and data are written next, which in turn

initiate the Embedded Program algorithm. The system is not

required to provide further controls or timings. The device

automatically provides internally generated program pulses

and verify the programmed cell margin. The Command

Definitions table shows the address and data requirements

for the byte program command sequence.

When the Embedded Program algorithm is complete, the

device then returns to reading array data and addresses are

no longer latched. The system can determine the status of

the program operation by using I/O7 or I/O6. See "Write

Operation Status" for information on these status bits.

Any commands written to the device during the Embedded

Program Algorithm are ignored. Programming is allowed in

any sequence and across sector boundaries. A bit cannot be

programmed from a "0" back to a "1 ". Attempting to do so

may halt the operation and set I/O5

to "1", or cause the

Data Polling algorithm to indicate the operation was

successful. However, a succeeding read will show that the

data is still "0". Only erase operations can convert a "0" to a

"1".

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