A64S0616G-70 datasheet(8/15 Pages) AMICC

Part #	A64S0616G-70

Description	1M X 16 Bit Low Voltage Super RAM

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Manufacturer	AMICC [AMIC Technology]

Direct Link	http://www.amictechnology.com

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A64S0616

PRELIMINARY

(July, 2002, Version 0.1)

7

AMIC Technology, Inc.

AC Characteristics (TA = 0

°C to +70°C or -25°C to 85°C, VCC = 2.7V to 3.1V)

Symbol

Parameter

-70

-85

Unit

Min.

Max.

Min.

Max.

Read Cycle

tRC

Read Cycle Time

70

-

85

-

ns

tSKEW

Address Skew

-

10

-

10

ns

tAA

Address Access Time

-

70

-

85

ns

tACE

Chip Enable Access Time

-

70

-

85

ns

tBE

Byte Enable Access Time

-

70

-

85

ns

tOE

Output Enable to Output Valid

-

35

-

45

ns

tCLZ

Chip Enable to Output in Low Z

10

-

10

-

ns

tBLZ

Byte Enable to Output in Low Z

5

-

5

-

ns

tOLZ

Output Enable to Output in Low Z

5

-

5

-

ns

tCHZ

Chip Disable to Output in High Z

0

25

0

35

ns

tBHZ

Byte Disable to Output in High Z

0

25

0

35

ns

tOHZ

Output Disable to Output in High Z

0

25

0

35

ns

tOH

Output Hold from Address Change

10

-

10

-

ns

tASC

Address Setup to CE1 Low

0

-

0

-

ns

tAHC

Address Hold Time from CE1 High

0

-

0

-

ns

tCEH

CE1 High Pulse With

10

-

10

-

ns

Write Cycle

tWC

Write Cycle Time

70

-

85

-

ns

tSKEW

Address Skew

-

10

-

10

ns

tCW

Chip Enable to End of Write

60

-

70

-

ns

tBW

Byte Enable to End of Write

60

-

70

-

ns

tAS

Address Setup Time

0

-

0

-

ns

tAW

Address Valid to End of Write

60

-

70

-

ns

tWP

Write Pulse Width

50

-

55

-

ns

tWR

Write Recovery Time

0

-

0

-

ns

tWHZ

Write to Output in High Z

-

20

-

20

ns

tDW

Data to Write Time Overlap

30

-

35

-

ns

tDH

Data Hold from Write Time

0

-

0

-

ns

tOW

Output Active from End of Write

5

-

5

-

ns

tASC

Address Setup to CE1 Low

0

-

0

-

ns

tAHC

Address Hold Time from CE1 High

0

-

0

-

ns

tCEH

CE1 High Pulse With

10

-

10

-

ns

tWEH

WE High Pulse With

10

-

10

-

ns

Note: tCHZ, tBHZ and tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are

not referred to output voltage levels.

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