A67L8316/A67L8318/

A67L7332/A67L7336 Series

PRELIMINARY

(December, 1999, Version 0.1)

9

AMIC Technology, Inc.

Partial Truth Table for READ/WRITE Commands (X16/X18)

Operation

BW1

BW2

READ

H

X

X

WRITE Byte “a”

L

L

H

WRITE Byte “b”

L

H

L

WRITE all bytes

L

L

L

WRITE Abort/NOP

L

H

H

Note : Using and BYTE WRITE(s), any one or more bytes may be written.

Partial Truth Table for READ/WRITE Commands (X32/X36)

Operation

BW1

BW2

BW3

BW4

READ

H

X

X

X

X

WRITE Byte “a”

L

L

H

H

H

WRITE Byte “b”

L

H

L

H

H

WRITE Byte “c”

L

H

H

L

H

WRITE Byte “d”

L

H

H

H

L

WRITE all bytes

L

L

L

L

L

WRITE Abort/NOP

L

H

H

H

H

Linear Burst Address Table (MODE = LOW)

First Address (External)

Second Address (Internal)

Third Address (Internal)

Fourth Address (Internal)

X . . . X00

X . . . X01

X . . . X10

X . . . X11

X . . . X01

X . . . X10

X . . . X11

X . . . X00

X . . . X10

X . . . X11

X . . . X00

X . . . X01

X . . . X11

X . . . X00

X . . . X01

X . . . X10

Interleaved Burst Address Table (MODE = HIGH or NC)

First Address (External)

Second Address (Internal)

Third Address (Internal)

Fourth Address (Internal)

X . . . X00

X . . . X01

X . . . X10

X . . . X11

X . . . X01

X . . . X00

X . . . X11

X . . . X10

X . . . X10

X . . . X11

X . . . X00

X . . . X01

X . . . X11

X . . . X10

X . . . X01

X . . . X00