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LP62S16256F-T Datasheet(PDF) 11 Page - AMIC Technology

Part # LP62S16256F-T
Description  256K X 16 BIT LOW VOLTAGE CMOS SRAM
Download  14 Pages
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Manufacturer  AMICC [AMIC Technology]
Direct Link  http://www.amictechnology.com
Logo AMICC - AMIC Technology

LP62S16256F-T Datasheet(HTML) 11 Page - AMIC Technology

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LP62S16256F-T Series
PRELIMINARY
(August, 2001, Version 0.2)
11
AMIC Technology, Inc.
AC Test Conditions
Input Pulse Levels
0.4V to 2.4V
Input Rise And Fall Time
5 ns
Input and Output Timing Reference Levels
1.5V
Output Load
See Figures 1 and 2
30pF
* Including scope and jig.
* Including scope and jig.
CL
TTL
5pF
CL
TTL
Figure 1. Output Load
Figure 2. Output Load for tCLZ, tOLZ,
tCHZ, tOHZ, tWHZ, and tOW
Data Retention Characteristics (TA = -25
°C to 85°C)
Symbol
Parameter
Min.
Max.
Unit
Conditions
VDR
VCC for Data Retention
2.0
3.3
V
CE
≥ VCC - 0.2V
or LB = HB
≥ VCC - 0.2V
ICCDR
Data Retention Current
-
5*
µA
VCC = 2.0V,
CE
≥ VCC - 0.2V or
LB = HB
≥ VCC - 0.2V
VIN
≥ VCC - 0.2V or VIN ≤ 0.2V
tCDR
Chip Disable to Data Retention Time
0
-
ns
tR
Operation Recovery Time
tRC
-
ns
See Retention Waveform
tVR
VCC Rising Time from Data Retention
Voltage to Operating Voltage
5
-
ms
* LP62S16256F-70LLT
ICCDR: max.
1.5
µA at TA = 0°C to + 40°C


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