LP62S2048AU-55LLT datasheet(4/17 Pages) AMICC

Part #	LP62S2048AU-55LLT

Description	256K X 8 BIT LOW VOLTAGE CMOS SRAM

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Manufacturer	AMICC [AMIC Technology]

Direct Link	http://www.amictechnology.com

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LP62S2048A-T Series

PRELIMINARY

(June, 2002, Version 0.0)

4

AMIC Technology, Inc.

Pin Description - SOP

Pin No.

Symbol

Description

1 - 12, 23,

25 - 28, 31

A0 - A17

Address Inputs

13 - 15,

17 - 21

I/O1 - I/O8

Data Input/Outputs

16

GND

Ground

22

CE1

Chip Enable

24

OE

Output Enable

29

WE

Write Enable

30

CE2

Chip Enable

32

VCC

Power Supply

Pin Descriptions - TSOP/TSSOP

Pin No.

Symbol

Description

1 - 4, 7,

9 - 20, 31

A0 - A17

Address Inputs

5

WE

Write Enable

6

CE2

Chip Enable

8

VCC

Power Supply

9

NC

No Connection

21 - 23,

25 - 29

I/O1 - I/O8

Data Input/Outputs

24

GND

Ground

30

CE1

Chip Enable

32

OE

Output Enable

Pin Description - CSP

Symbol

Description

Symbol

Description

A0 - A17

Address Inputs

NC

No Connection

WE

Write Enable

I/O1 - I/O8

Data Input/Output

OE

Output Enable

VCC

Power Supply

CE1

Chip Enable

GND

Ground

CE2

Chip Enable

--

Recommended DC Operating Conditions

(TA = -25

°C to + 85°C)

Symbol

Parameter

Min.

Typ.

Max.

Unit

VCC

Supply Voltage

2.7

3.0

3.3

V

GND

Ground

0

V

VIH

Input High Voltage

2.0

-

VCC + 0.3

V

VIL

Input Low Voltage

-0.3

-

+0.6

V

CL

Output Load

-

30

pF

TTL

Output Load

-

1

-

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LP62S2048AU-55LLT Datasheet(PDF) 4 Page - AMIC Technology

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