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TLK2541 Datasheet(PDF) 7 Page - Texas Instruments |
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TLK2541 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 26 page TLK2541 www.ti.com SLLS779B – JANUARY 2008 – REVISED APRIL 2008 DISSIPATION RATINGS (1) TA ≤ 25°C DERATING FACTOR TA = 70°C PACKAGE(2) POWER RATING ABOVE TA = 25°C POWER RATING PFP80(3) 5.01 W 42.9 mW/ °C 2.69 W (1) This data was taken using 2 oz trace and copper pad that is soldered directly to a JEDEC standard 4 layer 3 in × 3 in PCB. (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (3) Standard JEDEC High-K board. For more information, refer to TI application note PowerPAD ™ Thermally Enhanced package, TI literature number SLMA002. ELECTRICAL CHARACTERISTICS over recommended operating conditions PARAMETER TEST CONDITIONS MIN NOM MAX UNIT VDD Supply voltage 2.3 2.5 2.7 V Frequency = 1.25 Gbps, PRBS pattern 280 ICC Supply current mA Frequency = 2.5 Gbps, PRBS pattern 310 Frequency = 1.25 Gbps, PRBS pattern 700 PD Power dissipation Frequency = 2.5 Gbps, PRBS pattern 775 mW Frequency = 2.6 Gbps, worst case pattern(1) 825 Low Power Mode current TX_CLK Static, VDDA and VDD = Max 1 mA PLL startup lock time VDD, VDDC = 2.3 V 0.1 0.4 ms Data acquisition time Frequency = 1.25 Gbps or 2.5 Gbps, K28.5 D16.2 256 ns pattern (3 sigma values) TA Operating free-air temperature –40 85 °C (1) Worst case pattern is a pattern that creates a maximum transition density on the serial transceiver. REFERENCE CLOCK (REFCLK)TIMING REQUIREMENTS over recommended operating conditions (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Frequency Minimum data rate Typ –0.01% 100 Typ+0.01% MHz Frequency Maximum data rate Typ –0.01% 130 Typ+0.01% MHz Frequency tolerance –100 100 ppm Duty cycle 40% 50% 60% Jitter Peak-to-peak 40 ps © 2008, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s) :TLK2541 |
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