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LPC1813JET100 Datasheet(PDF) 7 Page - NXP Semiconductors |
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LPC1813JET100 Datasheet(HTML) 7 Page - NXP Semiconductors |
7 / 147 page LPC185X_3X_2X_1X All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Preliminary data sheet Rev. 4 — 31 October 2012 7 of 147 NXP Semiconductors LPC185x/3x/2x/1x 32-bit ARM Cortex-M3 microcontroller 6. Pinning information 6.1 Pinning 6.2 Pin description On the LPC185x/3x/2x/1x, digital pins are grouped into 16 ports, named P0 to P9 and PA to PF, with up to 20 pins used per port. Each digital pin can support up to eight different digital functions, including General-Purpose I/O (GPIO), selectable through the SCU registers. The pin name is not indicative of the GPIO port assigned to it. Fig 2. Pin configuration LBGA256 package Fig 3. Pin configuration TFBGA100 package 002aag541 LPC185x/3xFET256 Transparent top view T R P N M L J G K H F E D C B A 2 4 6 8 10 12 13 14 15 16 13579 11 ball A1 index area 002aah356 LPC183x/2x/1xFET100 Transparent top view J G K H F E D C B A 2468 10 13579 ball A1 index area Fig 4. Pin configuration LQFP208 package Fig 5. Pin configuration LQFP144 package LPC1857/53FBD208 104 53 157 208 002aag543 LPC183x/2x/1xFBD144 72 37 109 144 002aah357 |
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