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ASM25512C Datasheet(PDF) 6 Page - Aplus Intergrated Circuits |
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ASM25512C Datasheet(HTML) 6 Page - Aplus Intergrated Circuits |
6 / 7 page ASM25512C Rev 1.1 2002/10/29 5 1.4 Bonding Diagram Substrate must be connected to GND. ASM25512C Pad Location Chip Size: X= 3090 + 80 (um) , Y= 4470 + 80 (um) PAD # PAD Name X Y PAD # PAD Name X Y 1 VDD3 -1445.96 -2123.6 11 GND1 38.72 -2118.08 2 PRC1 -1325.24 -2123.6 12 GND2 118.72 -2118.08 3 PRC0 -1202.92 -2123.6 13 TEST 319.68 -2123.6 4 PRA3 -1080.6 -2123.6 14 VDD2 575.32 -2123.6 5 PRA2 -958.28 -2123.6 15 PRB0 714.48 -2123.6 6 PRA1 -835.96 -2123.6 16 PRB1 836.8 -2123.6 7 PRA0/RESET -713.64 -2123.6 17 PRB2 959.12 -2123.6 8 OSC -591.32 -2123.6 18 PRB3 1081.44 -2123.6 9 VDD1 -416.04 -2123.6 19 PRC2 1203.76 -2123.6 10 COUT -162.24 -2123.6 20 PRC3 1326.08 -2123.6 21 GND3 1449.36 -2123.6 3 ASM25512C (192K x 10 bit) x 4-Block ROM 4 5 6 7 8 9 10 11 12 13 18 17 16 15 14 2 1 19 20 21 CHIP SIZE: X= 3090 + 80 (um), Y= 4470 + 80 (um) X= 3090 + 80 (um) Y= 4470 + 80 (um) |
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