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ADS5520 Datasheet(PDF) 10 Page - Texas Instruments |
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ADS5520 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 32 page www.ti.com ADS5522 SBAS320C – MAY 2004 – REVISED FEBRUARY 2007 PIN ASSIGNMENTS TERMINAL NO. OF NAME NO. PINS I/O DESCRIPTION 5, 7, 9, 15, 22, AVDD 24, 26, 28, 33, 12 I Analog power supply 34, 37, 39 6, 8, 12–14, 16, AGND 18, 21, 23, 25, 14 I Analog ground 27, 32, 36, 38 DRVDD 49, 58 2 I Output driver power supply 1, 42, 48, 50, DRGND 6 I Output driver ground 57, 59 NC 44, 45 2 — Not connected INP 19 1 I Differential analog input (positive) INM 20 1 I Differential analog input (negative) REFP 29 1 O Reference voltage (positive); 1- F capacitor in series with a 1- Ω resistor to GND REFM 30 1 O Reference voltage (negative); 1- F capacitor in series with a 1- Ω resistor to GND IREF 31 1 I Current set; 56.2-k Ω resistor to GND; do not connect capacitors CM 17 1 O Common-mode output voltage RESET 35 1 I Reset (active high), Internal 200-k Ω resistor to AV DD (1) OE 41 1 I Output enable (active high)(2) DFS 40 1 I Data format and clock out polarity select(3)(2) CLKP 10 1 I Data converter differential input clock (positive) CLKM 11 1 I Data converter differential input clock (negative) SEN 4 1 I Serial interface chip select(2) SDATA 3 1 I Serial interface data(2) SCLK 2 1 I Serial interface clock(2) D0 (LSB) to 46, 47, 51–56, 14 O Parallel data output D11 (MSB) 60-63 OVR 64 1 O Over-range indicator bit CLKOUT 43 1 O CMOS clock out in sync with data (1) If RESET pin is unused, it must be tied to AGND and serial interface should be used to reset the device. See the serial programming interface section for details. (2) Pins OE, DFS, SEN, SDATA, and SCLK have internal clamping diodes to the DRVDD supply. Any external circuit driving these pins must also run off the same supply voltage as DRVDD. (3) Table 3 defines the voltage levels for each mode selectable via the DFS pin. 10 Submit Documentation Feedback |
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