Sample and Hold

DC Level

V/A

RAMP

(5 PA/V x (VIN ± VOUT) + 25 PA) x

LM5088, LM5088-Q1

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SNVS600H – DECEMBER 2008 – REVISED MARCH 2013

relatively large in comparison to the output voltage, controlling small pulse widths and duty cycles is necessary

for regulation. The LM5088 utilizes a unique ramp generator which does not actually measure the buck switch

current but rather reconstructs or emulates the signal. Emulating the inductor current provides a ramp signal that

is free of leading edge spikes and measurement or filtering delays. The current reconstruction is comprised of

two elements; a sample & hold DC level and an emulated current ramp.

Figure 17. Composition of Current Sense Signal

The sample & hold DC level illustrated in Figure 17 is derived from a measurement of the re-circulating (or free-

wheeling) diode current. The diode current flows through the current sense resistor connected between the CS

and CSG pins. The voltage across the sense resistor is sampled and held just prior to the onset of the next

conduction interval of the buck switch. The diode current sensing and sample & hold provide the DC level for the

reconstructed current signal. The positive slope inductor current ramp is emulated by an external capacitor

connected from the RAMP pin to GND and an internal voltage controlled current source. The ramp current

source that emulates the inductor current is a function of the VIN and VOUT voltages per the following equation:

(2)

Proper selection of the RAMP capacitor depends upon the selected value of the output inductor and the current

have the same dependence on the load current. That is:

where

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