VREFT

VA

AGND

VCLP

VA

AGND

SDIO

SCLK

SEN

AGND

VA

VREFB

OSR

AGND

OSG

AGND

OSB

AGND

CLK3

CLK2

CLK1

SH

RESET

SH_R

CLK8

CLK9

CLK10/CLKOUT

VD

DGND

D0/TXOUT0-

INCLK-

INCLK+

DVB

VR

DGND

CLK4

VC

DGND

CLK5

CLK6

CLK7

D1/TXOUT0+

D2/TXOUT1-

D3/TXOUT1+

D4/TXOUT2-

D5/TXOUT2+

D6/TXCLK-

D7/TXCLK+

100:

*

0.1 PF

0.1 PF

0.1 PF

0.1 PF

0.1 PF

0.1 PF

AGND

DGND

0.1 PF

VA

AGND

VD

DGND

0.1 PF

VC

DGND

0.1 PF

VR

DGND

Serial Interface and Device Control Bus

CCD Timing Generator Output Bus

CCD Clock Drivers

CCD Sensor

and

Output Signal

Buffers

LVDS Deserializer

(DS90CR218A or

equiv.)

ASIC and Clock Gen

VA

3.3V

+

VR

3.3V

+

4.7 PF

4.7 PF

AGND

DGND

VD VC

* 100: used for LVDS INCLK only.

If using CMOS INCLK, 100: is removed and INCLK- connected to DGND.

LM98714

www.ti.com

SNAS254 – OCTOBER 2006

Typical Application Diagram

Figure 3. Typical Application Diagram

Pin Descriptions

Pin

Name

Typ

Res

Description

1

CLK3

O

D

PU

Configurable sensor control output.

2

CLK2

O

D

PD

Configurable sensor control output.

3

CLK1

O

D

PU

Configurable sensor control output.

4

SH

O

D

PD

Sensor - Shift or transfer control signal for CCD and CIS sensors.

5

RESET

I

D

PU

Active-low master reset. NC when function not being used.

6

SH_R

I

D

PD

External request for an SH pulse.

7

SDIO

I/O

D

Serial Interface Data Input

8

SCLK

I

D

PD

Serial Interface shift register clock.

9

SEN

I

D

PU

Active-low chip enable for the Serial Interface.

10

AGND

P

Analog ground return.

11

P

Analog power supply. Bypass voltage source with 4.7

μF and pin with 0.1μF to AGND.

12

VREFB

O

A

Bottom of ADC reference. Bypass with a 0.1

μF capacitor to ground.

13

VREFT

O

A

Top of ADC reference. Bypass with a 0.1

μF capacitor to ground.

14

P

Analog power supply. Bypass voltage source with 4.7

μF and pin with 0.1μF to AGND.

15

AGND

P

Analog ground return.

16

VCLP

IO

A

Input Clamp Voltage. Normally bypassed with a 0.1

μF, and a 4.7μF capacitor to AGND. An

external reference voltage may be applied to this pin.

(1)

(I=Input), (O=Output), (IO=Bi-directional), (P=Power), (D=Digital), (A=Analog), (PU=Pull Up with an internal resistor), (PD=Pull Down

with an internal resistor.).

Copyright © 2006, Texas Instruments Incorporated

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