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PCA9306DCUR Datasheet(PDF) 1 Page - Texas Instruments |
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PCA9306DCUR Datasheet(HTML) 1 Page - Texas Instruments |
1 / 22 page DCT OR DCU PACKAGE (TOP VIEW) 1 8 GND 2 7 V REF1 3 6 SCL1 4 5 SDA1 EN V REF2 SCL2 SDA2 DQE PACKAGE (TOP VIEW) EN SCL2 SDA2 SCL1 SDA1 1 2 3 4 8 7 6 5 GND V REF1 V REF2 4 5 3 6 2 7 1 8 GND V REF1 SCL1 SDA1 EN V REF2 SCL2 SDA2 YZT PACKAGE (BOTTOM VIEW) D1 C1 B1 A1 D2 C2 B2 A2 PCA9306 www.ti.com SCPS113J – OCTOBER 2004 – REVISED OCTOBER 2010 DUAL BIDIRECTIONAL I2C BUS AND SMBus VOLTAGE-LEVEL TRANSLATOR Check for Samples: PCA9306 1 FEATURES • 2-Bit Bidirectional Translator for SDA and SCL • Latch-Up Performance Exceeds 100 mA Per Lines in Mixed-Mode I2C Applications JESD 78, Class II • I2C and SMBus Compatible • ESD Protection Exceeds JESD 22 • Less Than 1.5-ns Maximum Propagation Delay – 2000-V Human-Body Model (A114-A) to Accommodate Standard-Mode and – 200-V Machine Model (A115-A) Fast-Mode I2C Devices and Multiple Masters – 1000-V Charged-Device Model (C101) • Allows Voltage-Level Translator Between – 1.2-V VREF1 and 1.8-V, 2.5-V, 3.3-V, or 5-V VREF2 – 1.8-V VREF1 and 2.5-V, 3.3-V, or 5-V VREF2 – 2.5-V VREF1 and 3.3-V or 5-V VREF2 – 3.3-V VREF1 and 5-V VREF2 • Provides Bidirectional Voltage Translation With No Direction Pin • Low 3.5- Ω ON-State Connection Between Input and Output Ports Provides Less Signal Distortion • Open-Drain I2C I/O Ports (SCL1, SDA1, SCL2, and SDA2) • 5-V Tolerant I2C I/O Ports to Support Mixed-Mode Signal Operation • High-Impedance SCL1, SDA1, SCL2, and SDA2 Pins for EN = Low • Lock-Up-Free Operation for Isolation When EN = Low • Flow-Through Pinout for Ease of Printed Circuit Board Trace Routing DESCRIPTION/ORDERING INFORMATION This dual bidirectional I2C and SMBus voltage-level translator, with an enable (EN) input, is operational from 1.2-V to 3.3-V VREF1 and 1.8-V to 5.5-V VREF2. The PCA9306 allows bidirectional voltage translations between 1.2 V and 5 V, without the use of a direction pin. The low ON-state resistance (ron) of the switch allows connections to be made with minimal propagation delay. When EN is high, the translator switch is ON, and the SCL1 and SDA1 I/O are connected to the SCL2 and SDA2 I/O, respectively, allowing bidirectional data flow between ports. When EN is low, the translator switch is off, and a high-impedance state exists between ports. In I2C applications, the bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9306 enables the system designer to isolate two halves of a bus; thus, more I2C devices or longer trace length can be accommodated. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2004–2010, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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