OBSOLETE

LMX1600, LMX1601, LMX1602

SNAS017F – MARCH 1998 – REVISED APRIL 2013

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Programming Description

MICROWIRE INTERFACE

The descriptions below detail the 18-bit data register loaded through the MICROWIRE Interface. The 18-bit shift

register is used to program the 12-bit Main and Aux R counter registers and the 16-bit Main and Aux N counter

registers. The shift register consists of a 16-bit DATA field and a 2-bit control (CTL [1:0]) field as shown below.

The control bits decode the internal register address. On the rising edge of LE, data stored in the shift register is

loaded into one of the 4 appropriate latches (selected by address bits). Data is shifted in MSB first.

MSB

LSB

DATA [15:0]

CTL [1:0]

18

2 1

0

Register Location Truth Table

When LE transitions high, data is transferred from the 18-bit shift register into one of the 4 appropriate internal

latches depending upon the state of the control (CTL) bits. The control bits decode the internal register address

CTL [1:0]

DATA Location

0

0

AUX_R Register

0

1

AUX_N Register

1

0

MAIN_R Register

1

1

MAIN_N Register

Register Content Truth Table

First Bit

SHIFT REGISTER BIT LOCATION

Last Bit

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

AUX_R

FoLD

AUX_R_CNTR

0

0

AUX_N

AUX_B_CNTR

AUX_A_CNTR

0

1

MAIN_R

CP_WORD

MAIN_R_CNTR

1

0

MAIN_N

MAIN_B_CNTR and MAIN_A_CNTR

1

1

PROGRAMMABLE REFERENCE DIVIDERS

AUX_R Register

If the Control Bits (CTL [1:0]) are 0 0 when LE transitions high, data is transferred from the 18-bit shift register

into a latch which sets the Aux PLL 12-bit R counter divide ratio. The divide ratio is programmed using the bits

AUX_R_CNTR as shown in 12-Bit Programmable Main and Auxiliary Reference Divider Ratio (MAIN/AUX R

Counter). The divider ratio must be

≥ 2. The FoLD word bits controls the multifunction FoLD output as described

in Programming Description.

First Bit

SHIFT REGISTER BIT LOCATION

Last Bit

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

AUX_R

FoLD[3:0]

AUX_R_CNTR[11:0]

0

0

8

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