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TDP3500 Datasheet(PDF) 1 Page - List of Unclassifed Manufacturers

Part # TDP3500
Description  DDR Memory Bus Electrical Validation and Analysis Software
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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TDP3500 Datasheet(HTML) 1 Page - List of Unclassifed Manufacturers

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DDR Memory Bus Electrical Validation and Analysis
Software
Features & Benefits
Auto-configuration Wizard Guides Easy Setup and Test Configuration
Analyze All Read/Write Bursts in the Entire Acquisition
Plot DQS and DQ Eye Diagrams for Reads and Writes
Perform JEDEC Conformance Tests with Pass/Fail Limits
Use Chip Select to Qualify Multi-rank Measurements
Navigate and Time Stamp Reads and Writes in an Acquired Record
using Search and Mark
Use Pinpoint Triggering, Visual Trigger, and DPX to Quickly Identify
Infrequent Anomalies
Easily Move between Conformance-test and Analysis/Debug Tools
Automatically Produce Consolidated Reports with Pass/Fail Information,
Statistical Measurement Results, and Test-setup Information
On MSO70000, Use Address/Command Bus to Precisely Qualify Read
and Write Bursts or Other Events
On MSO70000, Perform Bus Timing Measurements on the
Address/Command Bus
Applications
DDR1
DDR2
DDR3
LPDDR
LPDDR2
GDDR5
Option DDRA accelerates the analysis, validation, and conformance testing
of memory systems based on JEDEC Test Recommendations.
A single license of DDRA provides support for multiple generations of the
JEDEC DDR Standard; beginning with DDR1, DDR2, DDR3, while including
DDR derivatives LPDDR, LPDDR2, and GDDR5. Option DDRA supports
the common data rates in these standards alongside custom data rates up
to and beyond 2133 MT/s. Whether you are doing intensive signal integrity
analysis or debugging a specific memory transaction, DDRA will speed
your ability to trigger on and identify read and write bursts in the acquired
data record and then perform parametric measurements on the signals of
interest.
DDRA Wizard for Easy Test Selection and
Configuration
The wizard consolidates Tektronix experience and expertise in DDR testing
into a simple, easy-to-follow test selection interface. The user selects which
DDR technology, speed grade, and measurement group (reads, writes,
clocks, address, and control lines) they are testing, using check boxes to
select some or all measurements in a category. DDRA can then automate
oscilloscope scale selection, DQ and DQS level selections, and threshold
detection, then automate burst identification using search and mark. Search
and mark (for read/write measurements) data is used to identify and
separate all read vs. write bursts across the entire acquisition and qualify
measurement zones for use by DPOJET Advanced Jitter and Eye Analysis.
DPOJET will generate an eye diagram of the data and perform JEDEC
standard measurements qualified on read or write bursts. Measurement
configurations and JEDEC pass/fail limits are automatically applied for the
selected measurements. Every edge in each identified burst is measured,
then measurement results are included in statistics and plots for a complete
analysis of the acquired waveform.


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