AT27C800

2

The AT27C800 can be organized as either word-wide or

byte-wide. The organization is selected via the BYTE/V

PP

pin. When BYTE/V

organization is selected and the O15/A-1 pin is used for

O15 data output. When BYTE/V

byte wide organization is selected and the O15/A-1 pin is

used for the address pin A-1. When the AT27C800 is logi-

cally regarded as x16 (word-wide), but read in the byte-

wide mode, then with A-1=V

bit word are selected with A-1 =V

16-bit word are selected.

In read mode, the AT27C800 typically consumes 15 mA.

Standby mode supply current is typically less than 10

µA.

The AT27C800 is available in industry standard JEDEC-

approved one-time programmable (OTP)PDIP, SOIC

(SOP), and TSOP as well as UV erasable windowed Cer-

dip packages. The device features two-line control(CE,OE)

to eliminate bus contention in high-speed systems.

With high density 512K word or 1024K-bit storage capabil-

ity, the AT27C800 allows firmware to be to be stored reli-

ably and to be accessed by the system without the delays

of mass storage media.

Atmel’s AT27C800 has additional features that ensure high

quality and efficient production use. The Rapid

ming Algorithm reduces the time required to program the

part and guarantees reliable programming. Programming

time is typically only 50

µs/word. The Integrated Product

Identification Code electronically identifies the device and

manufacturer. This feature is used by industry standard

programming equipment to select the proper programming

equipment and voltages.

Erasure Characteristics

The entire memory array of the AT27C800 is erased (all

outputs read as V

wavelength of 2,537Å. Complete erasure is assured after a

minimum of 20 minutes of exposure using 12,000

intensity lamps spaced one inch away from the chip. Mini-

mum erase time for lamps at other intensity ratings can be

calculated from the minimum integrated erasure dose of 15

W.sec/cm

label is recommended to cover the clear window on any UV

erasable EPROM that will be subjected to continuous

flourescent indoor lighting or sunlight.

System Considerations

Switching between active and standby conditions via the

Chip Enable pin may produce transient voltage excursions.

Unless accommodated by the system design, these tran-

sients may exceed data sheet limits, resulting in device

non-conformance. At a minimum, a 0.1

µF high frequency,

low inherent inductance, ceramic capacitor should be uti-

lized for each device. This capacitor should be connected

between the V

close to the device as possible. Additionally, to stabilize the

supply voltage level on printed circuit boards with large

EPROM arrays, a 4.7

µF bulk electrolytic capacitor should

be utilized, again connected between the V

terminals. This capacitor should be positioned as close as

possible to the point where the power supply is connected

to the array.

Block Diagram